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Roy Dz-Ching Ju

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Lixia Liu

> Home > Persons > Roy Dz-Ching Ju

Publications

2007
[c31]
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  dblp key:
  - conf/hipeac/LiuLCJ07
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  persistent URL:
  - https://dblp.org/rec/conf/hipeac/LiuLCJ07
Lixia Liu, Xiao-Feng Li, Michael K. Chen, Roy Dz-Ching Ju:
A Throughput-Driven Task Creation and Mapping for Network Processors. HiPEAC 2007: 227-241
2005
[c29]
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  dblp key:
  - conf/lcpc/LiuLLWJ05
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  - https://dblp.org/rec/conf/lcpc/LiuLLWJ05
Tao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Roy Ju:
Optimizing Packet Accesses for a Domain Specific Language on Network Processors. LCPC 2005: 47-61
[c27]
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  dblp key:
  - conf/pldi/ChenLLLLLJ05
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  - https://dblp.org/rec/conf/pldi/ChenLLLLLJ05
Michael K. Chen, Xiao-Feng Li, Ruiqi Lian, Jason H. Lin, Lixia Liu, Tao Liu, Roy Ju:
Shangri-La: achieving high performance from compiled network applications while enabling ease of programming. PLDI 2005: 224-236
2004
[j11]
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  - electronic edition @ jilp.org (open access)
  - no references & citations available
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  - journals/jilp/ChenLJFYW04
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  - https://dblp.org/rec/journals/jilp/ChenLJFYW04
Dong-yuan Chen, Lixia Liu, Roy Dz-Ching Ju, Chen Fu, Shuxin Yang, Chengyong Wu:
Efficient Modeling of Itanium Architecture during Instruction Scheduling using Extended Finite State Automata. J. Instr. Level Parallelism 6 (2004)
[c25]
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  dblp key:
  - conf/lcpc/WuLZJCLFZ04
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  - https://dblp.org/rec/conf/lcpc/WuLZJCLFZ04
Chengyong Wu, Ruiqi Lian, Junchao Zhang, Roy Ju, Sun Chan, Lixia Liu, Xiaobing Feng, Zhaoqing Zhang:
An Overview of the Open Research Compiler. LCPC 2004: 17-31
2003
[c22]
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  dblp key:
  - conf/IEEEpact/ChenLFYWJ03
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  - https://dblp.org/rec/conf/IEEEpact/ChenLFYWJ03
Dong-yuan Chen, Lixia Liu, Chen Fu, Shuxin Yang, Chengyong Wu, Roy Dz-Ching Ju:
Efficient Resource Management during Instruction Scheduling for the EPIC Architecture. IEEE PACT 2003: 36-45

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