Guido Masera

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Mario R. Casu

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Publications

2004
[j7]
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Mariagrazia Graziano, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
Effects of temperature in deep-submicron global interconnect optimization in future technology nodes. Microelectron. J. 35(10): 849-857 (2004)
[j6]
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Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
An electromigration and thermal model of power wires for a priori high-level reliability prediction. IEEE Trans. Very Large Scale Integr. Syst. 12(4): 349-358 (2004)
2003
[j5]
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Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
Coupled electro-thermal modeling and optimization of clock networks. Microelectron. J. 34(12): 1175-1185 (2003)
[c21]
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  - conf/patmos/CasuGPMZ03
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Mario R. Casu, Mariagrazia Graziano, Gianluca Piccinini, Guido Masera, Maurizio Zamboni:
Effects of Temperature in Deep-Submicron Global Interconnect Optimization. PATMOS 2003: 90-100
[c20]
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  - conf/patmos/AddinoCMPZ03
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M. Addino, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni:
A Block-Based Approach for SoC Global Interconnect Electrical Parameters Characterization. PATMOS 2003: 121-130
2002
[c15]
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  - conf/patmos/CasuGMPPZ02
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Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, M. M. Prono, Maurizio Zamboni:
Clock Distribution Network Optimization under Self-Heating and Timing Constraints. PATMOS 2002: 198-208
2001
[c12]
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  - conf/islped/CasuPMZ01
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Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni:
Synthesis of low-leakage PD-SOI circuits with body-biasing. ISLPED 2001: 287-290
2000
[c8]
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  - conf/iscas/CasuMPRZ00
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Mario Roberto Casu, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni:
A high accuracy-low complexity model for CMOS delays. ISCAS 2000: 455-458

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