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Kwang-Hyun Baek

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Yun-Hwan Jung

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Publications

2018
[j25]
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  dblp key:
  - journals/tcas/JungJYYJKB18
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  persistent URL:
  - https://dblp.org/rec/journals/tcas/JungJYYJKB18
Dong-Kyu Jung, Yun-Hwan Jung, Taegeun Yoo, Dong-Hyun Yoon, Bo-Yun Jung, Tony Tae-Hyoung Kim, Kwang-Hyun Baek:
A 12-bit Multi-Channel R-R DAC Using a Shared Resistor String Scheme for Area-Efficient Display Source Driver. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3688-3697 (2018)
2014
[j21]
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  - journals/jssc/YooYJCKKB14
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  - https://dblp.org/rec/journals/jssc/YooYJCKKB14
Taegeun Yoo, Hong Chang Yeoh, Yun-Hwan Jung, Seong Jin Cho, Yong Sin Kim, Sung-Mo Kang, Kwang-Hyun Baek:
A 2 GHz 130 mW Direct-Digital Frequency Synthesizer With a Nonlinear DAC in 55 nm CMOS. IEEE J. Solid State Circuits 49(12): 2976-2989 (2014)
[c21]
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  - conf/isscc/YooJYKKB14
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  - https://dblp.org/rec/conf/isscc/YooJYKKB14
Taegeun Yoo, Yun-Hwan Jung, Hong Chang Yeoh, Yong Sin Kim, Sung-Mo Kang, Kwang-Hyun Baek:
21.3 A 2GHz 130mW direct-digital frequency synthesizer with a nonlinear DAC in 55nm CMOS. ISSCC 2014: 364-365
2013
[j20]
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  dblp key:
  - journals/ieiceee/JungKHKB13
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  - https://dblp.org/rec/journals/ieiceee/JungKHKB13
Yun-Hwan Jung, Yong Sin Kim, Yohan Hong, Ju Eon Kim, Kwang-Hyun Baek:
Low-power pipelined phase accumulator using CMOS-CML hybrid F/Fs for pre-skewing operation. IEICE Electron. Express 10(19): 20130571 (2013)
2010
[j15]
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  - journals/jssc/YeohJJB10
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  - https://dblp.org/rec/journals/jssc/YeohJJB10
Hong Chang Yeoh, Jae-Hun Jung, Yun-Hwan Jung, Kwang-Hyun Baek:
A 1.3-GHz 350-mW Hybrid Direct Digital Frequency Synthesizer in 90-nm CMOS. IEEE J. Solid State Circuits 45(9): 1845-1855 (2010)

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