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ORCIDMartti Forsell
- > Home > Persons > Martti Forsell
Publications
- 2023
[j16]Martti Forsell, Jussi Roivainen, Ville Leppänen
, Jesper Larsson Träff:
Realizing multioperations and multiprefixes in Thick Control Flow processors. Microprocess. Microsystems 98: 104807 (2023)- [c50]Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff:
Preliminary Performance and Memory Access Scalability Study of Thick Control Flow Processors. NorCAS 2023: 1-7 - 2022
- [j15]Martti Forsell, Sara Nikula, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff:
Performance and programmability comparison of the thick control flow architecture and current multicore processors. J. Supercomput. 78(3): 3152-3183 (2022) - 2020
- [c49]Martti Forsell, Jussi Roivainen, Jesper Larsson Träff:
Optimizing Memory Access in TCF Processors with Compute-Update Operations. IPDPS Workshops 2020: 577-586 - 2018
- [j14]Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff:
Supporting concurrent memory access in TCF processor architectures. Microprocess. Microsystems 63: 226-236 (2018) - [j13]Martti Forsell, Jussi Roivainen, Ville Leppänen:
REPLICA MBTAC: multithreaded dual-mode processor. J. Supercomput. 74(5): 1911-1933 (2018) - [c47]Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff:
Implementation of Multioperations in Thick Control Flow Processors. IPDPS Workshops 2018: 744-752 - 2017
- [c45]Martti Forsell, Jussi Roivainen, Ville Leppänen, Jesper Larsson Träff:
Supporting concurrent memory access in TCF-aware processor architectures. NORCAS 2017: 1-6 - 2016
- [c42]Martti Forsell, Jussi Roivainen, Ville Leppänen:
The REPLICA on-chip network. NORCAS 2016: 1-6 - [c41]Martti Forsell, Jussi Roivainen, Ville Leppänen:
Outline of a Thick Control Flow Architecture. SBAC-PAD (Workshops) 2016: 1-6 - 2014
- [c38]Martti Forsell, Jussi Roivainen:
REPLICA T7-16-128 - A 2048-threaded 16-core 7-FU chained VLIW chip multiprocessor. ACSSC 2014: 1709-1713 - [c36]Martti Forsell, Jussi Roivainen, Ville Leppänen:
Prototyping the MBTAC Processor for the REPLICA CMP. IPDPS Workshops 2014: 709-716 - 2008
- [c13]Martti Forsell, Jussi Roivainen:
Performance, Area and Power Trade-Offs in Mesh-based Emulated Shared Memory CMP Architectures. PDPTA 2008: 471-477
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