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Donald Yeung

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Meenatchi Jagasivamani

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Publications

2021
[j22]
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  dblp key:
  - journals/taco/WaldenSJLKADJY21
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  persistent URL:
  - https://dblp.org/rec/journals/taco/WaldenSJLKADJY21
Candace Walden, Devesh Singh, Meenatchi Jagasivamani, Shang Li, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Monolithically Integrating Non-Volatile Main Memory over the Last-Level Cache. ACM Trans. Archit. Code Optim. 18(4): 48:1-48:26 (2021)
2020
[c28]
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  dblp key:
  - conf/coolchips/JagasivamaniWSK20
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  - https://dblp.org/rec/conf/coolchips/JagasivamaniWSK20
Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Tileable Monolithic ReRAM Memory Design. COOL CHIPS 2020: 1-3
2019
[j20]
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  - journals/micro/JagasivamaniWSK19
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  - https://dblp.org/rec/journals/micro/JagasivamaniWSK19
Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die. IEEE Micro 39(6): 64-72 (2019)
[c27]
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  dblp key:
  - conf/memsys/JagasivamaniWSK19
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  - https://dblp.org/rec/conf/memsys/JagasivamaniWSK19
Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Donald Yeung, Bruce L. Jacob:
Design for ReRAM-based main-memory architectures. MEMSYS 2019: 342-350
2018
[c26]
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  dblp key:
  - conf/memsys/JagasivamaniWSK18
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  - https://dblp.org/rec/conf/memsys/JagasivamaniWSK18
Meenatchi Jagasivamani, Candace Walden, Devesh Singh, Luyi Kang, Shang Li, Mehdi Asnaashari, Sylvain Dubois, Bruce L. Jacob, Donald Yeung:
Memory-systems challenges in realizing monolithic computers. MEMSYS 2018: 98-104

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