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ORCIDYoshinori Yamaguchi
- > Home > Persons > Yoshinori Yamaguchi
Publications
- 1997
[c29]Yuetsu Kodama, Hirofumi Sakane, Hanpei Koike, Mitsuhisa Sato, Shuichi Sakai, Yoshinori Yamaguchi:
Parallel Execution of Radix Sort Program Using Fine-Grain Communication. IEEE PACT 1997: 136-145- [c28]Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
Experience with Fine-Grain Communication in EM-X Multiprocessor for Parallel Sparse Matrix Computation. IPPS 1997: 242-248 - [c26]Andrew Sohn, Yuetsu Kodama, Jui Ku, Mitsuhisa Sato, Hirofumi Sakane, Hayato Yamana
, Shuichi Sakai, Yoshinori Yamaguchi:
Fine-Grain Multithreading with the EM-X Multiprocessor. SPAA 1997: 189-198 - 1996
- [c25]Andrew Sohn, Jui Ku, Yuetsu Kodama, Mitsuhisa Sato, Hirofumi Sakane, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
Identifying the capability of overlapping computation with communication. IEEE PACT 1996: 133-138 - 1995
- [c24]Hayato Yamana, Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Shuichi Sakai, Yoshinori Yamaguchi:
A Macrotask-level Unlimited Speculative Execution on Multiprocessors. International Conference on Supercomputing 1995: 328-337 - [c23]Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Hayato Yamana, Shuichi Sakai, Yoshinori Yamaguchi:
The EM-X Parallel Computer: Architecture and Basic Performance. ISCA 1995: 14-23 - 1994
- [c20]Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
EM-C: Programming with Explicit Parallelism and Locality for EM-4 Multiprocessor. IFIP PACT 1994: 3-14 - [c19]Mitsuhisa Sato, Yuetsu Kodama, Yoshinori Yamaguchi, Shuichi Sakai:
Experience with Executing Shared Memory Programs using Fine-Grain Communication and Multithreading in EM-4. IPPS 1994: 630-636 - [c18]Yuetsu Kodama, Hirofumi Sakane, Mitsuhisa Sato, Shuichi Sakai, Yoshinori Yamaguchi:
Message-based efficient remote memory access on a highly parallel computer EM-X. ISPAN 1994: 135-142 - [c16]Andrew Sohn, Mitsuhisa Sato, Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Nonnumeric search results on the EM-4 distributed-memory multiprocessor. SC 1994: 301-310 - [c15]Andrew Sohn, Mitsuhisa Sato, Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Parallel bidirectional heuristic search on the EM-4 multiprocessor. SPDP 1994: 100-107 - [c14]Mitsuhisa Sato, Yuetsu Kodama, Hirofumi Sakane, Yoshinori Yamaguchi, Shuichi Sakai:
Programming with Distributed Data Structure for EM-X Multiprocessor. Theory and Practice of Parallel Programming 1994: 472-483 - 1993
- [j7]Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Design and Implementation of a Circular Omega Network in the EM-4. Parallel Comput. 19(2): 125-142 (1993) - [j6]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Evaluation of parallel execution performance by highly parallel computer EM-4. Syst. Comput. Jpn. 24(9): 32-41 (1993) - [c13]Yuetsu Kodama, Yasuhito Koumura, Mitsuhisa Sato, Hirohumi Sakane, Shuichi Sakai, Yoshinori Yamaguchi:
EMC-Y: Parallel Processing Element Optimizing Communication and Computation. International Conference on Supercomputing 1993: 167-174 - 1992
- [j5]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation. Future Gener. Comput. Syst. 7(2-3): 199-209 (1992) - [j4]Kazuaki Okamoto, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Methodologies in development and testing of the dataflow machine EM-4. Parallel Comput. 18(8): 901-912 (1992) - [c11]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Evaluation of the EM-4 Highly Parallel Computer using a Game Tree Searching Problem. FGCS 1992: 731-738 - [c10]Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi, Yasuhito Koumura:
Thread-based Programming for the EM-4 Hybrid Dataflow Machine. ISCA 1992: 146-155 - 1991
- [c9]Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Design and Implementation of a Versatile Interconnection Network in the EM-4. ICPP (1) 1991: 426-430 - [c8]Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Prototype Implementation of a Highly Parallel Dataflow Machine EM-4. IPPS 1991: 278-286 - [c7]Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi:
Load balancing by function distribution on the EM-4 prototype. SC 1991: 522-531 - 1990
- [c6]Toshitsugu Yuba, Toshio Shimada, Yoshinori Yamaguchi, Kei Hiraki, Shuichi Sakai:
Dataflow computer development in Japan. ICS 1990: 140-147 - 1989
- [c5]Yoshinori Yamaguchi, Shuichi Sakai, Kei Hiraki, Yuetsu Kodama:
An Architectural Disgn of a Highly Parallel Dataflow Machine. IFIP Congress 1989: 1155-1160 - [c4]Shuichi Sakai, Yoshinori Yamaguchi, Kei Hiraki, Yuetsu Kodama, Toshitsugu Yuba:
An Architecture of a Dataflow Single Chip Processor. ISCA 1989: 46-53
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