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Yohei Hori
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Publications
- 2021
- [j8]Yusuke Yano, Kengo Iokibe, Toshiaki Teshima, Yoshitaka Toyota, Toshihiro Katashita, Yohei Hori:
Evaluation of Side-Channel Leakage Simulation by Using EMC Macro-Model of Cryptographic Devices. IEICE Trans. Commun. 104-B(2): 178-186 (2021) - 2020
- [j7]Yasuhiro Ogasahara, Yohei Hori, Toshihiro Katashita, Tomoki Iizuka, Hiromitsu Awano, Makoto Ikeda, Hanpei Koike:
Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge-Response pair acquisition using Built-In Self-Test before shipping. Integr. 71: 144-153 (2020) - 2019
- [c17]Risa Yashiro, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama:
A Deep Learning Attack Countermeasure with Intentional Noise for a PUF-Based Authentication Scheme. SECITC 2019: 78-94 - 2018
- [j6]Toshihiro Katashita, Masakazu Hioki, Yohei Hori, Hanpei Koike:
Development of an Evaluation Platform and Performance Experimentation of Flex Power FPGA Device. IEICE Trans. Inf. Syst. 101-D(2): 303-313 (2018) - 2017
- [c15]Toshihiro Katashita, Yohei Hori, Yasuhiro Ogasahara:
Prototype of USB stick-sized PUF module for authentication and key generation. GCCE 2017: 1-2 - 2014
- [j5]Daisuke Fujimoto, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Takafumi Aoki, Yohei Hori, Toshihiro Katashita, Kazuo Sakiyama, Thanh-Ha Le, Julien Bringer, Pirouz Bazargan-Sabet, Shivam Bhasin, Jean-Luc Danger:
Power Noise Measurements of Cryptographic VLSI Circuits Regarding Side-Channel Information Leakage. IEICE Trans. Electron. 97-C(4): 272-279 (2014) - [j4]Yohei Hori, Hyunho Kang, Toshihiro Katashita, Akashi Satoh, Shin-ichi Kawamura, Kazukuni Kobara:
Evaluation of Physical Unclonable Functions for 28-nm Process Field-Programmable Gate Arrays. J. Inf. Process. 22(2): 344-356 (2014) - 2013
- [j3]Yohei Hori, Toshihiro Katashita, Hirofumi Sakane, Kenji Toda, Akashi Satoh:
Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption. IEICE Trans. Inf. Syst. 96-D(11): 2333-2343 (2013) - [j2]Daisuke Fujimoto, Toshihiro Katashita, Akihiko Sasaki, Yohei Hori, Akashi Satoh, Makoto Nagata:
A Fast Power Current Simulation of Cryptographic VLSI Circuits for Side Channel Attack Evaluation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(12): 2533-2541 (2013) - [c12]Toshihiro Katashita, Akihiko Sasaki, Yohei Hori:
A novel smart card development platform for evaluating physical attacks and PUFs. GCCE 2013: 37-39 - [c11]Yohei Hori, Toshihiro Katashita, Kazukuni Kobara:
Energy and area saving effect of Dynamic Partial Reconfiguration on a 28-nm process FPGA. GCCE 2013: 217-218 - 2011
- [c10]Daisuke Fujimoto, Makoto Nagata, Toshihiro Katashita, Akihiro T. Sasaki, Yohei Hori, Akashi Satoh:
A fast power current analysis methodology using capacitor charging model for side channel attack evaluation. HOST 2011: 87-92 - [c9]Yohei Hori, Hyunho Kang, Toshihiro Katashita, Akashi Satoh:
Pseudo-LFSR PUF: A Compact, Efficient and Reliable Physical Unclonable Function. ReConFig 2011: 223-228 - 2010
- [c8]Yohei Hori, Takahiro Yoshida, Toshihiro Katashita, Akashi Satoh:
Quantitative and Statistical Performance Evaluation of Arbiter Physical Unclonable Functions on FPGAs. ReConFig 2010: 298-303
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