Shailendra Jain

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with David Finan

> Home > Persons > Shailendra Jain

Publications

2010
[c4]
- view
  authority control:
- export record
  dblp key:
  - conf/isscc/HowardDHVFRJWBSPJJYMSEKRDLGAHLSBDWM10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/HowardDHVFRJWBSPJJYMSEKRDLGAHLSBDWM10
Jason Howard, Saurabh Dighe, Yatin Vasant Hoskote, Sriram R. Vangal, David Finan, Gregory Ruhl, David Jenkins, Howard Wilson, Nitin Borkar, Gerhard Schrom, Fabric Pailet, Shailendra Jain, Tiju Jacob, Satish Yada, Sraven Marella, Praveen Salihundam, Vasantha Erraguntla, Michael Konow, Michael Riepen, Guido Droege, Joerg Lindemann, Matthias Gries, Thomas Apel, Kersten Henriss, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek De, Rob F. Van der Wijngaart, Timothy G. Mattson:
A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS. ISSCC 2010: 108-109
2008
[j3]
- view
  authority control:
- export record
  dblp key:
  - journals/jssc/VangalHRDWTFSJJ08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/VangalHRDWTFSJJ08
Sriram R. Vangal, Jason Howard, Gregory Ruhl, Saurabh Dighe, Howard Wilson, James W. Tschanz, David Finan, Arvind P. Singh, Tiju Jacob, Shailendra Jain, Vasantha Erraguntla, Clark Roberts, Yatin Vasant Hoskote, Nitin Borkar, Shekhar Borkar:
An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS. IEEE J. Solid State Circuits 43(1): 29-41 (2008)
2007
[c2]
- view
  authority control:
- export record
  dblp key:
  - conf/isscc/VangalHRDWTFISJJVHB07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/VangalHRDWTFISJJVHB07
Sriram R. Vangal, Jason Howard, Gregory Ruhl, Saurabh Dighe, Howard Wilson, James W. Tschanz, David Finan, Priya Iyer, Arvind P. Singh, Tiju Jacob, Shailendra Jain, Sriram Venkataraman, Yatin Hoskote, Nitin Borkar:
An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS. ISSCC 2007: 98-589

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.