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ORCIDYiorgos Makris
- > Home > Persons > Yiorgos Makris
Publications
- 2024
[j54]Ke Huang
, Yu Liu, Nenad Korolija, John M. Carulli, Yiorgos Makris:
Statistical Methods for Detecting Recycled Electronics: From ICs to PCBs and Beyond. IEEE Des. Test 41(2): 15-22 (2024)- 2017
- [j40]Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Ke Huang, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris:
Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(12): 2120-2133 (2017) - 2015
- [j35]Ke Huang, Nathan Kupp, Constantinos Xanthopoulos, John M. Carulli Jr., Yiorgos Makris:
Low-Cost Analog/RF IC Testing Through Combined Intra- and Inter-Die Correlation Models. IEEE Des. Test 32(1): 53-60 (2015) - [j32]Ke Huang, Yu Liu, Nenad Korolija, John M. Carulli, Yiorgos Makris:
Recycled IC Detection Based on Statistical Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(6): 947-960 (2015) - [c99]Ali Ahmadi, Ke Huang, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris:
Yield prognosis for fab-to-fab product migration. VTS 2015: 1-6 - 2014
- [j29]Ujjwal Guin, Ke Huang, Daniel DiMase, John M. Carulli, Mohammad Tehranipoor, Yiorgos Makris:
Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain. Proc. IEEE 102(8): 1207-1228 (2014) - [c96]Ali Ahmadi, Ke Huang, Suriyaprakash Natarajan, John M. Carulli Jr., Yiorgos Makris:
Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation. ITC 2014: 1-10 - [c95]Constantinos Xanthopoulos, Ke Huang, Abbas Poonawala, Amit Nahar, Bob Orr, John M. Carulli Jr., Yiorgos Makris:
IC laser trimming speed-up through wafer-level spatial correlation modeling. ITC 2014: 1-7 - 2013
- [c93]Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris:
Handling discontinuous effects in modeling spatial correlation of wafer-level analog/RF tests. DATE 2013: 553-558 - [c91]Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris:
On combining alternate test with spatial correlation modeling in analog/RF ICs. ETS 2013: 1-6 - [c84]Ke Huang, John M. Carulli, Yiorgos Makris:
Counterfeit electronics: A rising threat in the semiconductor manufacturing industry. ITC 2013: 1-4 - [c83]Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris:
Process monitoring through wafer-level spatial variation decomposition. ITC 2013: 1-10 - 2012
- [c80]Ke Huang, John M. Carulli Jr., Yiorgos Makris:
Parametric counterfeit IC detection via Support Vector Machines. DFT 2012: 7-12 - [c79]Nathan Kupp, Ke Huang, John M. Carulli Jr., Yiorgos Makris:
Spatial correlation modeling for probe test cost reduction in RF devices. ICCAD 2012: 23-29 - [c76]Nathan Kupp, Ke Huang, John M. Carulli Jr., Yiorgos Makris:
Spatial estimation of wafer measurement parameters using Gaussian process models. ITC 2012: 1-8
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