Steven Wallace

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Nader Bagherzadeh

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Publications

1998
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Steven Wallace, Nader Bagherzadeh:
A scalable register file architecture for superscalar processors. Microprocess. Microsystems 22(1): 49-60 (1998)
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Steven Wallace, Nader Bagherzadeh:
Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors. IEEE Trans. Parallel Distributed Syst. 9(6): 570-578 (1998)
1997
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Steven Wallace, Nader Bagherzadeh:
Multiple Branch and Block Prediction. HPCA 1997: 94-103
1996
[c4]
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Steven Wallace, Nader Bagherzadeh:
A scalable register file architecture for dynamically scheduled processors. IEEE PACT 1996: 179-184
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Steven Wallace, Nader Bagherzadeh:
Instruction Fetching Mechanisms for Superscalar Microprocessors. Euro-Par, Vol. II 1996: 747-756
1995
[j1]
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Steven Wallace, Nader Bagherzadeh:
Performance issues of a superscalar microprocessor. Microprocess. Microsystems 19(4): 187-199 (1995)
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Steven Wallace, Nirav Dagli, Nader Bagherzadeh:
Design and implementation of a 100 MHz centralized instruction window for a superscalar microprocessor. ICCD 1995: 96-101
1994
[c1]
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Steven Wallace, Nader Bagherzadeh:
Performance Issues of a Superscalar Microprocessor. ICPP (1) 1994: 293-297

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