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Parthasarathy Ranganathan
Publications
- 2002
- [j5]Christopher J. Hughes, Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve:
RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors. Computer 35(2): 40-49 (2002) - 2000
- [c8]Parthasarathy Ranganathan, Sarita V. Adve, Norman P. Jouppi:
Reconfigurable caches and their application to media processing. ISCA 2000: 214-224 - 1999
- [j3]Sarita V. Adve, Vijay S. Pai, Parthasarathy Ranganathan:
Recent advances in memory consistency models for hardware shared memory systems. Proc. IEEE 87(3): 445-455 (1999) - [j2]Vijay S. Pai, Parthasarathy Ranganathan, Hazim Abdel-Shafi, Sarita V. Adve:
The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors. IEEE Trans. Computers 48(2): 218-226 (1999) - [c7]Parthasarathy Ranganathan, Sarita V. Adve, Norman P. Jouppi:
Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions. ISCA 1999: 124-135 - 1998
- [c6]Parthasarathy Ranganathan, Kourosh Gharachorloo, Sarita V. Adve, Luiz André Barroso:
Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors. ASPLOS 1998: 307-318 - 1997
- [j1]Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve:
RSIM: Rice simulator for ILP multiprocessors. SIGARCH Comput. Archit. News 25(5): 1 (1997) - [c5]Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve:
The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology. HPCA 1997: 72-83 - [c4]Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abdel-Shafi, Sarita V. Adve:
The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems. ISCA 1997: 144-156 - [c3]Parthasarathy Ranganathan, Vijay S. Pai, Sarita V. Adve:
Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap Between Memory Consistency Models. SPAA 1997: 199-210 - [c2]Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve:
RSIM: a simulator for shared-memory multiprocessor and uniprocessor systems that exploit ILP. WCAE@HPCA 1997: 6 - 1996
- [c1]Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve, Tracy Harton:
An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors. ASPLOS 1996: 12-23
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