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Henrik Hulgaard
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Publications
- 2003
- [j11]Poul Frederick Williams, Henrik Reif Andersen, Henrik Hulgaard:
Satisfiability checking using Boolean Expression Diagrams. Int. J. Softw. Tools Technol. Transf. 5(1): 4-14 (2003) - 2002
- [j10]Gerd Behrmann, Kim Guldstrand Larsen, Henrik Reif Andersen, Henrik Hulgaard, Jørn Lind-Nielsen:
Verification of Hierarchical State/Event Systems using Reusability and Compositionality. Formal Methods Syst. Des. 21(2): 225-244 (2002) - [j9]Henrik Reif Andersen, Henrik Hulgaard:
Boolean Expression Diagrams. Inf. Comput. 179(2): 194-212 (2002) - [j8]Jesper B. Møller, Henrik Hulgaard, Henrik Reif Andersen:
Symbolic model checking of timed guarded commands using difference decision diagrams. J. Log. Algebraic Methods Program. 52-53: 53-77 (2002) - [c15]Jesper B. Møller, Henrik Hulgaard, Henrik Reif Andersen:
Timed Verification of Asynchronous Circuits. Concurrency and Hardware Design 2002: 274-312 - 2001
- [j7]Jørn Lind-Nielsen, Henrik Reif Andersen, Henrik Hulgaard, Gerd Behrmann, Kåre J. Kristoffersen, Kim Guldstrand Larsen:
Verification of Large State/Event Systems Using Compositionality and Dependency Analysis. Formal Methods Syst. Des. 18(1): 5-23 (2001) - [c14]Poul Frederick Williams, Henrik Reif Andersen, Henrik Hulgaard:
Satisfiability Checking Using Boolean Expression Diagrams. TACAS 2001: 39-51 - 2000
- [j6]Jørgen Staunstrup, Henrik Reif Andersen, Henrik Hulgaard, Jørn Lind-Nielsen, Kim Guldstrand Larsen, Gerd Behrmann, Kåre J. Kristoffersen, Arne Skou, Henrik Leerberg, Niels Bo Theilgaard:
Practical Verification of Embedded Software. Computer 33(5): 68-75 (2000) - 1999
- [j4]Henrik Hulgaard, Poul Frederick Williams, Henrik Reif Andersen:
Equivalence checking of combinational circuits using Boolean expression diagrams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(7): 903-917 (1999) - [c12]Jesper B. Møller, Jakob Lichtenberg, Henrik Reif Andersen, Henrik Hulgaard:
Difference Decision Diagrams. CSL 1999: 111-125 - [c11]Poul Frederick Williams, Henrik Hulgaard, Henrik Reif Andersen:
Equivalence checking of hierarchical combinational circuits. ICECS 1999: 355-360 - [c10]Gerd Behrmann, Kim Guldstrand Larsen, Henrik Reif Andersen, Henrik Hulgaard, Jørn Lind-Nielsen:
Verification of Hierarchical State/Event Systems Using Reusability and Compositionality. TACAS 1999: 163-177 - [c9]Jesper B. Møller, Jakob Lichtenberg, Henrik Reif Andersen, Henrik Hulgaard:
Fully Symbolic Model Checking of Timed Systems using Difference Decision Diagrams. SMC@FLoC 1999: 88-107 - 1998
- [c7]Jørn Lind-Nielsen, Henrik Reif Andersen, Gerd Behrmann, Henrik Hulgaard, Kåre J. Kristoffersen, Kim Guldstrand Larsen:
Verification of Large State/Event Systems Using Compositionality and Dependency Analysis. TACAS 1998: 201-216 - 1997
- [c6]Henrik Reif Andersen, Henrik Hulgaard:
Boolean Expression Diagrams (Extended Abstract). LICS 1997: 88-98
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