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ORCIDCésar A. M. Marcon
- > Home > Persons > César A. M. Marcon
Publications
- 2014
[j5]Edson I. Moreno, Thais Webber
, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
MoNoC: A monitored network on chip with path adaptation mechanism. J. Syst. Archit. 60(10): 783-795 (2014)- [c39]Edson I. Moreno, Thais Webber, César A. M. Marcon, Fernando Moraes, Ney Calazans:
A monitored NoC with runtime path adaptation. ISCAS 2014: 1965-1968 - 2013
- [c32]Yan Ghidini, Matheus T. Moreira, Lucas Brahm, Thais Webber, Ney Calazans, César A. M. Marcon:
Lasio 3D NoC vertical links serialization: Evaluation of latency and buffer occupancy. SBCCI 2013: 1-6 - 2011
- [j4]César A. M. Marcon, Ney Calazans, Edson I. Moreno, Fernando Moraes, Fabiano Hessel, Altamiro Amadeu Susin:
CAFES: A framework for intrachip application modeling and communication architecture design. J. Parallel Distributed Comput. 71(5): 714-728 (2011) - [c22]Edson I. Moreno, César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Arbitration and routing impact on NoC design. International Symposium on Rapid System Prototyping 2011: 193-198 - 2009
- [c21]Ewerson Carvalho, César A. M. Marcon, Ney Calazans, Fernando Moraes:
Evaluation of static and dynamic task mapping algorithms in NoC-based MPSoCs. SoC 2009: 87-90 - 2008
- [j3]César Augusto Missio Marcon, Edson Ifarraguirre Moreno, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Comparison of network-on-chip mapping algorithms targeting low energy consumption. IET Comput. Digit. Tech. 2(6): 471-482 (2008) - 2007
- [c17]César A. M. Marcon, Edson I. Moreno, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Evaluation of Algorithms for Low Energy Mapping onto NoCs. ISCAS 2007: 389-392 - [i1]César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel:
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique. CoRR abs/0710.4738 (2007) - 2005
- [c9]César A. M. Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Igor M. Reis, Fabiano Hessel:
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique. DATE 2005: 502-507 - [c8]Márcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Altamiro Amadeu Susin, Ney Laert Vilar Calazans:
Energy and latency evaluation of NoC topologies. ISCAS (6) 2005: 5866-5869 - [c7]César A. M. Marcon, Márcio Eduardo Kreutz, Altamiro Amadeu Susin, Ney Laert Vilar Calazans:
Models for Embedded Application Mapping onto NoCs: Timing Analysis. IEEE International Workshop on Rapid System Prototyping 2005: 17-23 - [c5]José Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin:
Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation. SBCCI 2005: 196-201 - [c4]César A. M. Marcon, José Carlos S. Palma, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis:
Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs. VLSI-SoC 2005: 179-194 - 2002
- [c2]César A. M. Marcon, Fabiano Hessel, Alexandre M. Amory, Luis H. L. Ries, Fernando Gehm Moraes, Ney Laert Vilar Calazans:
Prototyping of embedded digital systems from SDL language: a case study. HLDVT 2002: 133-138 - [c1]César Augusto Missio Marcon, Ney Laert Vilar Calazans, Fernando Gehm Moraes:
Requirements, Primitives and Models for Systems Specification. SBCCI 2002: 323-330
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