Tsuyoshi Arigane

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Yoshitaka Sasago

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Publications

2007
[j4]
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Kazuo Otsuga, Hideaki Kurata, Satoshi Noda, Yoshitaka Sasago, Tsuyoshi Arigane, Tetsufumi Kawamura, Takashi Kobayashi:
Selective-Capacitance Constant-Charge-Injection Programming Scheme for High-Speed Multilevel AG-AND Flash Memories. IEICE Trans. Electron. 90-C(4): 772-778 (2007)
[j3]
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Hideaki Kurata, Satoshi Noda, Yoshitaka Sasago, Kazuo Otsuga, Tsuyoshi Arigane, Tetsufumi Kawamura, Takashi Kobayashi, Hitoshi Kume, Kazuki Homma, Teruhiko Ito, Yoshinori Sakamoto, Masahiro Shimizu, Yoshinori Ikeda, Osamu Tsuchiya, Kazunori Furusawa:
A 126 mm² 4-Gb Multilevel AG-AND Flash Memory with Inversion-Layer-Bit-Line Technology. IEICE Trans. Electron. 90-C(11): 2146-2156 (2007)
2006
[j2]
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Hideaki Kurata, Shunichi Saeki, Takashi Kobayashi, Yoshitaka Sasago, Tsuyoshi Arigane, Keiichi Yoshida, Yoshinori Takase, Takayuki Yoshitake, Osamu Tsuchiya, Yoshinori Ikeda, Shunichi Narumi, Michitaro Kanamitsu, Kazuto Izawa, Kazunori Furusawa:
A 130-nm CMOS 95-mm² 1-Gb Multilevel AG-AND-Type Flash Memory with 10-MB/s Programming Throughput. IEICE Trans. Electron. 89-C(10): 1469-1479 (2006)
2005
[j1]
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Hideaki Kurata, Shunichi Saeki, Takashi Kobayashi, Yoshitaka Sasago, Tsuyoshi Arigane, Kazuo Otsuga, Takayuki Kawahara:
Constant-charge-injection programming: a novel high-speed programming method for multilevel flash memories. IEEE J. Solid State Circuits 40(2): 523-531 (2005)

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