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Wu-Tung Cheng
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Publications
- 2022
- [j29]Chong-Siao Ye, Shi-Xuan Zheng, Fong-Jyun Tsai, Chen Wang, Kuen-Jong Lee, Wu-Tung Cheng, Sudhakar M. Reddy, Justyna Zawada, Mark Kassab, Janusz Rajski:
Efficient Test Compression Configuration Selection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2323-2336 (2022) - [c131]Shi-Xuan Zheng, Chung-Yu Yeh, Kuen-Jong Lee, Chen Wang, Wu-Tung Cheng, Mark Kassab, Janusz Rajski, Sudhakar M. Reddy:
Accurate Estimation of Test Pattern Counts for a Wide-Range of EDT Input/Output Channel Configurations. VTS 2022: 1-7 - 2021
- [j28]Wu-Tung Cheng, Sylwester Milewski, Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer:
Autonomous Scan Patterns for Laser Voltage Imaging. IEEE Trans. Emerg. Top. Comput. 9(2): 680-691 (2021) - 2020
- [j27]Wu-Tung Cheng, Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer:
Scan Integrity Tests for EDT Compression. IEEE Des. Test 37(4): 21-26 (2020) - [c128]Fong-Jyun Tsai, Chong-Siao Ye, Yu Huang, Kuen-Jong Lee, Wu-Tung Cheng, Sudhakar M. Reddy, Mark Kassab, Janusz Rajski:
Efficient Prognostication of Pattern Count with Different Input Compression Ratios. ETS 2020: 1-2 - [c127]Fong-Jyun Tsai, Chong-Siao Ye, Kuen-Jong Lee, Shi-Xuan Zheng, Yu Huang, Wu-Tung Cheng, Sudhakar M. Reddy, Mark Kassab, Janusz Rajski, Chen Wang, Justyna Zawada:
Prediction of Test Pattern Count and Test Data Volume for Scan Architectures under Different Input Channel Configurations. ITC 2020: 1-10 - [c125]Fong-Jyun Tsai, Chong-Siao Ye, Yu Huang, Kuen-Jong Lee, Wu-Tung Cheng, Sudhakar M. Reddy, Mark Kassab, Janusz Rajski, Shi-Xuan Zheng:
Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels. ITC-Asia 2020: 130-135 - 2019
- [c119]Wu-Tung Cheng, Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer:
On Cyclic Scan Integrity Tests for EDT-based Compression. VTS 2019: 1-6 - 2015
- [j19]Wu-Tung Cheng, Yan Dong, Grady Giles, Yu Huang, Jakub Janicki, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer:
Scan Test Bandwidth Management for Ultralarge-Scale System-on-Chip Architectures. IEEE Trans. Very Large Scale Integr. Syst. 23(6): 1050-1062 (2015) - [c110]Xijiang Lin, Wu-Tung Cheng, Janusz Rajski:
On Improving Transition Test Set Quality to Detect CMOS Transistor Stuck-Open Faults. ATS 2015: 97-102 - 2014
- [c99]Yu Huang, Mark Kassab, Jay Jahangiri, Janusz Rajski, Wu-Tung Cheng, Dongkwan Han, Jihye Kim, Kun Young Chung:
Test Compression Improvement with EDT Channel Sharing in SoC Designs. NATW 2014: 22-31 - 2013
- [c95]Jakub Janicki, Jerzy Tyszer, Wu-Tung Cheng, Yu Huang, Mark Kassab, Nilanjan Mukherjee, Janusz Rajski, Yan Dong, Grady Giles:
EDT bandwidth management - Practical scenarios for large SoC designs. ITC 2013: 1-10 - 2008
- [j9]Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Wu-Tung Cheng, Nilanjan Mukherjee, Mark Kassab:
X-Press: Two-Stage X-Tolerant Compactor With Programmable Selector. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(1): 147-159 (2008) - 2007
- [j8]Jerzy Tyszer, Janusz Rajski, Grzegorz Mrugalski, Nilanjan Mukherjee, Mark Kassab, Wu-Tung Cheng, Manish Sharma, Liyang Lai:
X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis. IEEE Des. Test Comput. 24(5): 476-485 (2007) - 2006
- [c43]Yu Huang, Wu-Tung Cheng, Nagesh Tamarapalli, Janusz Rajski, Randy Klingenberg, Will Hsu, Yuan-Shih Chen:
Diagnosis with Limited Failure Information. ITC 2006: 1-10 - [c42]Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Wu-Tung Cheng, Nilanjan Mukherjee, Mark Kassab:
X-Press Compactor for 1000x Reduction of Test Data. ITC 2006: 1-10 - 2005
- [c35]Yu Huang, Wu-Tung Cheng, Janusz Rajski:
Compressed pattern diagnosis for scan chain failures. ITC 2005: 8 - 2004
- [c30]Wu-Tung Cheng, Kun-Han Tsai, Yu Huang, Nagesh Tamarapalli, Janusz Rajski:
Compactor Independent Direct Diagnosis. Asian Test Symposium 2004: 204-209
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