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Josep Torrellas
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Publications
- 2017
- [c161]Raghavendra Pradyumna Pothukuchi, Amin Ansari, Bhargava Gopireddy, Josep Torrellas:
Sthira: A Formal Approach to Minimize Voltage Guardbands under Variation in Networks-on-Chip for Energy Efficiency. PACT 2017: 260-272 - 2016
- [c146]Raghavendra Pradyumna Pothukuchi, Amin Ansari, Petros G. Voulgaris, Josep Torrellas:
Using Multiple Input, Multiple Output Formal Control to Maximize Resource Efficiency in Architectures. ISCA 2016: 658-670 - 2014
- [c139]Aditya Agrawal, Amin Ansari, Josep Torrellas:
Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules. HPCA 2014: 84-95 - [c137]Amin Ansari, Asit K. Mishra, Jianping Xu, Josep Torrellas:
Tangle: Route-oriented dynamic voltage minimization for variation-afflicted, energy-efficient on-chip networks. HPCA 2014: 440-451 - 2013
- [c127]Aditya Agrawal, Prabhat Jain, Amin Ansari, Josep Torrellas:
Refrint: Intelligent refresh to minimize power in on-chip multiprocessor cache hierarchies. HPCA 2013: 400-411 - [c126]Amin Ansari, Shuguang Feng, Shantanu Gupta, Josep Torrellas, Scott A. Mahlke:
Illusionist: Transforming lightweight cores into aggressive cores on demand. HPCA 2013: 436-447
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