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ORCIDToshihiro Hanawa
- > Home > Persons > Toshihiro Hanawa
Publications
- 2019
[j6]Masahiro Nakao, Tetsuya Odajima, Hitoshi Murai, Akihiro Tabuchi, Norihisa Fujita, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato:
Evaluation of XcalableACC with tightly coupled accelerators/InfiniBand hybrid communication on accelerated cluster. Int. J. High Perform. Comput. Appl. 33(5) (2019)- 2018
- [c44]Masashi Horikoshi, Larry Meadows, Tom Elken, Pradeep Sivakumar, Edward Mascarenhas, James Erwin, Dmitry Durnov, Alexander Sannikov, Toshihiro Hanawa
, Taisuke Boku:
Scaling collectives on large clusters using Intel(R) architecture processors and fabric. HPC Asia Workshops 2018: 59-62 - 2016
- [c37]Kazuya Matsumoto, Norihisa Fujita, Toshihiro Hanawa, Taisuke Boku:
Implementation and Evaluation of NAS Parallel CG Benchmark on GPU Cluster with Proprietary Interconnect TCA. VECPAR 2016: 135-145 - 2015
- [c35]Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Hideharu Amano, Hitoshi Murai, Masayuki Umemura, Mitsuhisa Sato:
Towards Unification of Accelerated Computing and Interconnection For Extreme-Scale Computing. ARC 2015: 463-474 - [c34]Toshihiro Hanawa, Hisafumi Fujii, Norihisa Fujita, Tetsuya Odajima, Kazuya Matsumoto, Yuetsu Kodama, Taisuke Boku:
Improving Strong-Scaling on GPU Cluster Based on Tightly Coupled Accelerators Architecture. CLUSTER 2015: 88-91 - [c33]Tetsuya Odajima, Taisuke Boku, Toshihiro Hanawa, Hitoshi Murai, Masahiro Nakao, Akihiro Tabuchi, Mitsuhisa Sato:
Hybrid Communication with TCA and InfiniBand on a Parallel Programming Language XcalableACC for GPU Clusters. CLUSTER 2015: 627-634 - [c32]Toshihiro Hanawa, Hisafumi Fujii, Norihisa Fujita, Tetsuya Odajima, Kazuya Matsumoto, Taisuke Boku:
Evaluation of FFT for GPU Cluster Using Tightly Coupled Accelerators Architecture. CLUSTER 2015: 635-641 - [c30]Kazuya Matsumoto, Toshihiro Hanawa, Yuetsu Kodama, Hisafumi Fujii, Taisuke Boku:
Implementation of CG Method on GPU Cluster with Proprietary Interconnect TCA for GPU Direct Communication. IPDPS Workshops 2015: 647-655 - 2014
- [j5]Yuetsu Kodama, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato:
PEACH2: An FPGA-based PCIe network device for Tightly Coupled Accelerators. SIGARCH Comput. Archit. News 42(4): 3-8 (2014) - [c29]Norihisa Fujita, Hisafumi Fujii, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Yoshinobu Kuramashi, Mike Clark:
QCD Library for GPU Cluster with Proprietary Interconnect for GPU Direct Communication. Euro-Par Workshops (1) 2014: 251-262 - [c28]Takuya Kuhara, Takahiro Kaneda, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Hideharu Amano:
A Preliminarily Evaluation of PEACH3: A Switching Hub for Tightly Coupled Accelerators. CANDAR 2014: 377-381 - [c27]Masahiro Nakao, Hitoshi Murai, Takenori Shimosaka, Akihiro Tabuchi, Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato:
XcalableACC: extension of XcalableMP PGAS language using OpenACC for accelerator clusters. WACCPD@SC 2014: 27-36 - 2013
- [c26]Takaaki Miyajima, Takuya Kuhara, Toshihiro Hanawa, Hideharu Amano, Taisuke Boku:
Task level pipelining with PEACH2: An FPGA switching fabric for high performance computing. FPT 2013: 466-469 - [c25]Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato:
Interconnection Network for Tightly Coupled Accelerators Architecture. Hot Interconnects 2013: 79-82 - [c24]Tetsuya Odajima, Taisuke Boku, Mitsuhisa Sato, Toshihiro Hanawa, Yuetsu Kodama, Raymond Namyst, Samuel Thibault, Olivier Aumage:
Adaptive Task Size Control on High Level Programming for GPU/CPU Work Sharing. ICA3PP (2) 2013: 59-68 - [c23]Toshihiro Hanawa, Yuetsu Kodama, Taisuke Boku, Mitsuhisa Sato:
Tightly Coupled Accelerators Architecture for Minimizing Communication Latency among Accelerators. IPDPS Workshops 2013: 1030-1039 - 2012
- [c21]Tetsuya Odajima, Taisuke Boku, Toshihiro Hanawa, Jinpil Lee, Mitsuhisa Sato:
GPU/CPU Work Sharing with Parallel Language XcalableMP-dev for Parallelized Accelerated Computing. ICPP Workshops 2012: 97-106 - 2011
- [j4]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Toshihiro Hanawa, Shin'ichi Miura, Taisuke Boku:
Peach: A Multicore Communication System on Chip with PCI Express. IEEE Micro 31(6): 39-50 (2011) - [c20]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato:
An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller. COOL Chips 2011: 1-3 - [c19]Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato:
XMCAPI: Inter-core Communication Interface on Multi-chip Embedded Systems. EUC 2011: 397-402 - [c18]Toshihiro Hanawa, Taisuke Boku, Shin'ichi Miura, Mitsuhisa Sato, Kazutami Arimoto:
PEARL and PEACH: A Novel PCI Express Direct Link and Its Implementation. IPDPS Workshops 2011: 871-879 - [c17]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Yasushi Hayakawa, Takeshi Oshita, Satoshi Kaneko, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato:
An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs. ISSCC 2011: 266-268 - 2010
- [c15]Toshihiro Hanawa, Taisuke Boku, Shin'ichi Miura, Mitsuhisa Sato, Kazutami Arimoto:
PEARL: Power-Aware, Dependable, and High-Performance Communication Link Using PCI Express. GreenCom/CPSCom 2010: 284-291 - 2009
- [c12]Taiga Yonemoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato:
Flexible Multi-link Ethernet Binding System for PC Clusters with Asymmetric Topology. ICPADS 2009: 49-56 - [c11]Shin'ichi Miura, Toshihiro Hanawa, Taiga Yonemoto, Taisuke Boku, Mitsuhisa Sato:
RI2N/DRV: Multi-link ethernet for high-bandwidth and fault-tolerant network on PC clusters. IPDPS 2009: 1-7 - [c10]Yutaka Ishikawa, Hajime Fujita, Toshiyuki Maeda, Motohiko Matsuda, Midori Sugaya, Mitsuhisa Sato, Toshihiro Hanawa, Shin'ichi Miura, Taisuke Boku, Yuki Kinebuchi, Lei Sun, Tatsuo Nakajima, Jin Nakazawa, Hideyuki Tokuda:
Towards an Open Dependable Operating System. ISORC 2009: 20-27 - [c9]Toshihiro Hanawa, Mitsuhisa Sato, Jinpil Lee, Takayuki Imada, Hideaki Kimura, Taisuke Boku:
Evaluation of Multicore Processors for Embedded Systems by Parallel Benchmark Program Using OpenMP. IWOMP 2009: 15-27 - 2008
- [c8]Shin'ichi Miura, Takayuki Okamoto, Taisuke Boku, Toshihiro Hanawa, Mitsuhisa Sato:
RI2N: High-bandwidth and fault-tolerant network with multi-link Ethernet for PC clusters. CLUSTER 2008: 274-279 - [c7]Shin'ichi Miura, Taisuke Boku, Takayuki Okamoto, Toshihiro Hanawa:
A dynamic routing control system for high-performance PC cluster with multi-path Ethernet connection. IPDPS 2008: 1-8
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