Jin-Man Han

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Kihwan Choi

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Publications

2015
[j4]
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  - journals/jssc/ParkNKKLCCKKKPSKPLYKSARKYKSBCHKCK15
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Ki-Tae Park, Sangwan Nam, Dae-Han Kim, Pansuk Kwak, Doosub Lee, Yoon-Hee Choi, Myung-Hoon Choi, Dong-Hun Kwak, Doo-Hyun Kim, Minsu Kim, Hyun Wook Park, Sang-Won Shim, Kyung-Min Kang, Sang-Won Park, Kangbin Lee, Hyun-Jun Yoon, Kuihan Ko, Dong-Kyo Shim, Yang-Lo Ahn, Jinho Ryu, Donghyun Kim, Kyunghwa Yun, Joonsoo Kwon, Seunghoon Shin, Dae-Seok Byeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Jeong-Hyuk Choi, Kinam Kim:
Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming. IEEE J. Solid State Circuits 50(1): 204-213 (2015)
2014
[c7]
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  - conf/isscc/ParkHKNCKKLCKCK14
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Ki-Tae Park, Jin-Man Han, Dae-Han Kim, Sangwan Nam, Kihwan Choi, Minsu Kim, Pansuk Kwak, Doosub Lee, Yoon-Hee Choi, Kyung-Min Kang, Myung-Hoon Choi, Dong-Hun Kwak, Hyun Wook Park, Sang-Won Shim, Hyun-Jun Yoon, Doo-Hyun Kim, Sang-Won Park, Kangbin Lee, Kuihan Ko, Dong-Kyo Shim, Yang-Lo Ahn, Jeunghwan Park, Jinho Ryu, Donghyun Kim, Kyunghwa Yun, Joonsoo Kwon, Seunghoon Shin, Dongkyu Youn, Won-Tae Kim, Taehyun Kim, Sung-Jun Kim, Sungwhan Seo, Hyunggon Kim, Dae-Seok Byeon, Hyang-Ja Yang, Moosung Kim, Myong-Seok Kim, Jinseon Yeon, Jae-hoon Jang, Han-Soo Kim, Woonkyung Lee, Duheon Song, Sungsoo Lee, Kyehyun Kyung, Jeong-Hyuk Choi:
19.5 Three-dimensional 128Gb MLC vertical NAND Flash-memory with 24-WL stacked layers and 50MB/s high-speed programming. ISSCC 2014: 334-335
2013
[j3]
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Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun:
Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classification for Next Generation Multi-Bit/Cell NAND FLASH. IEEE J. Solid State Circuits 48(4): 948-959 (2013)
2012
[c4]
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  - conf/isscc/LeeCYJJHPKYLMYLPKYKCKJCIKHPYLLKKSJCHKLJ12
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Daeyeal Lee, Ik Joon Chang, Sangyong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, ByungJun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, Ansoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, Hoosung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun:
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. ISSCC 2012: 430-432
[c2]
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  - conf/vlsic/ChoPYLJSCHKJ12
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Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun:
Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH. VLSIC 2012: 136-137

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