Andrés David García García

◀ ▶ joint publications with Luis Fernando González Pérez

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Publications

2013
[c12]
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Pedro Cervantes Lozano, Luis Fernando González Pérez, Andrés David García García:
A VLSI architecture for the QR decomposition based on the MCGR algorithm. ReConFig 2013: 1-6
2012
[c11]
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Pedro Cervantes Lozano, Luis Fernando González Pérez, Andrés David García García:
A VLSI architecture for the K-best Sphere-Decoder in MIMO systems. ReConFig 2012: 1-6
2011
[c10]
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Pedro Cervantes Lozano, Luis Fernando González Pérez, Andrés David García García:
Analysis of Parallel Sorting Algorithms in K-best Sphere-Decoder Architectures for MIMO Systems. ReConFig 2011: 321-326
2005
[c6]
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  - conf/conielecomp/MarinGPV05
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Roberto Ramírez Marín, Andrés David García García, Luis Fernando González Pérez, Javier Eduardo González Villarruel:
Hardware Architecture of MAP Algorithm for Turbo Codes Implemented in a FPGA. CONIELECOMP 2005: 70-75
[c5]
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  - conf/conielecomp/PerezBGVA05
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Luis Fernando González Pérez, Emmanuel Boutillon, Andrés David García García, Javier Eduardo González Villarruel, Reynaldo Félix Acuña:
VLSI Architecture for the M Algorithm Suited for Detection and Source Coding Applications. CONIELECOMP 2005: 119-124
[c4]
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  - conf/conielecomp/GarciaPA05
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Andrés David García García, Luis Fernando González Pérez, Reynaldo Félix Acuña:
Power Consumption Management on FPGAs. CONIELECOMP 2005: 240-245

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