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Paul P. Sotiriadis
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Publications
- 2016
- [j19]Paul P. Sotiriadis:
Spurs-Free Single-Bit-Output All-Digital Frequency Synthesizers With Forward and Feedback Spurs and Noise Cancellation. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(5): 567-576 (2016) - 2015
- [c28]Paul P. Sotiriadis:
Spurs-free single-bit-output frequency synthesizers for fully-digital RF transmitters. ISCAS 2015: 2561-2564 - 2011
- [c25]Paul-Peter Sotiriadis:
Spurs suppression and deterministic jitter correction in all-digital frequency synthesizers, current state and future directions. ISCAS 2011: 422-425 - 2010
- [j14]Paul P. Sotiriadis:
Theory of Flying-Adder Frequency Synthesizers - Part I: Modeling, Signals' Periods and Output Average Frequency. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 1935-1948 (2010) - [j13]Paul P. Sotiriadis:
Theory of Flying-Adder Frequency Synthesizers - Part II: Time- and Frequency-Domain Properties of the Output Signal. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 1949-1963 (2010) - [c24]Paul-Peter Sotiriadis:
All-digital frequency and clock synthesis architectures from a signals and systems perspective, current state and future directions. ISCAS 2010: 233-236 - [c23]Paul-Peter Sotiriadis:
Optimizing continuous-time filters driven by bang-bang signals. ISCAS 2010: 1264-1267 - 2008
- [j11]Paul-Peter Sotiriadis:
Cascaded Diophantine Frequency Synthesis. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(3): 741-751 (2008) - [j10]Paul-Peter Sotiriadis:
Diophantine Frequency Synthesis for Fast-Hopping, High-Resolution Frequency Synthesizers. IEEE Trans. Circuits Syst. II Express Briefs 55-II(4): 374-378 (2008) - 2007
- [c16]Paul-Peter Sotiriadis:
An Information Theory Approach to Power - Optimal Trafic Routing in Networks on Chips. ISCAS 2007: 393-396 - [c14]Paul-Peter Sotiriadis:
Diophantine Frequency Synthesis The Mathematical Principles. ISCAS 2007: 3107-3110 - 2006
- [j4]Paul-Peter Sotiriadis:
Information Capacity of Nanowire Crossbar Switching Networks. IEEE Trans. Inf. Theory 52(7): 3019-3032 (2006) - [c7]Paul P. Sotiriadis:
Nanoscale Data Storage Devices Capacity and Encoding Schemes. Nano-Net 2006: 1-4 - 2003
- [c6]Paul-Peter Sotiriadis:
Information storage capacity of crossbar switching networks. ACM Great Lakes Symposium on VLSI 2003: 45-49 - 2002
- [b1]Paul-Peter Sotiriadis:
Interconnect modeling and optimization in deep sub-micron technologies. Massachusetts Institute of Technology, Cambridge, MA, USA, 2002
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