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P. V. Ananda Mohan
- > Home > Persons > P. V. Ananda Mohan
Publications
- 2024
- [j26]P. V. Ananda Mohan:
New Generalized Impedance Converter (GIC)-Based Two-Opamp Active RC Biquads. Circuits Syst. Signal Process. 43(3): 1366-1390 (2024) - 2023
- [j25]P. V. Ananda Mohan:
Analysis of GIC-Based Frequency-Dependent Negative Resistance-Based Filters. Circuits Syst. Signal Process. 42(4): 2433-2451 (2023) - [c9]P. V. Ananda Mohan:
Hash-based Digital Signatures- A tutorial review. PKIA 2023: 1-8 - 2020
- [j23]P. V. Ananda Mohan:
On Actively Compensated Amplifiers Using Negative Impedance Converters. IEEE Trans. Circuits Syst. II Express Briefs 67-II(4): 640-644 (2020) - 2018
- [j22]P. V. Ananda Mohan:
Reverse Converters for the Moduli Set { \(2^{n}, 2^{n-1}-1, 2^{n}-1, 2^{n+1}-1\}(n\, \hbox {Even})\). Circuits Syst. Signal Process. 37(8): 3605-3634 (2018) - 2017
- [j20]P. V. Ananda Mohan:
Reverse Conversion Using Core Function, CRT and Mixed Radix Conversion. Circuits Syst. Signal Process. 36(7): 2847-2874 (2017) - 2016
- [j19]P. V. Ananda Mohan:
RNS to Binary Conversion Using Diagonal Function and Pirlo and Impedovo Monotonic Function. Circuits Syst. Signal Process. 35(3): 1063-1076 (2016) - 2013
- [j15]P. V. Ananda Mohan:
Comments on "Noise Performance of a Regulated Cascode Transimpedance Amplifier for Radiation Detectors". IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(8): 2235-2236 (2013) - 2011
- [j12]P. V. Ananda Mohan:
Comments on "Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers". IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2114-2116 (2011) - 2010
- [j10]P. V. Ananda Mohan:
Sensitivity Analysis of Third and Fourth-Order Filters. Circuits Syst. Signal Process. 29(5): 999-1005 (2010) - 2007
- [j8]P. V. Ananda Mohan:
Comments on "A 4th-Order Active- Gm-RC Reconfigurable (UMTS/WLAN) Filter". IEEE J. Solid State Circuits 42(2): 457-458 (2007) - [j6]Pemmaraju V. Ananda Mohan:
RNS-To-Binary Converter for a New Three-Moduli Set {2n+1-1, 2n, 2n-1}. IEEE Trans. Circuits Syst. II Express Briefs 54-II(9): 775-779 (2007) - 2005
- [j5]P. V. Ananda Mohan:
Floating Capacitance Simulation Using Current Conveyors. J. Circuits Syst. Comput. 14(1): 123-128 (2005) - 2003
- [c5]P. V. Ananda Mohan:
Fast implementations of Montgomery's modular multiplication algorithm. ISCAS (4) 2003: 125-128 - 1999
- [j4]P. V. Ananda Mohan:
Efficient Design of Binary to RNS Converters. J. Circuits Syst. Comput. 9(3-4): 145-154 (1999) - 1995
- [j3]P. V. Ananda Mohan:
Capacitor Floatation Scheme using only OTAs and Grounded capacitors. J. Circuits Syst. Comput. 5(2): 181-198 (1995) - 1994
- [c2]P. V. Ananda Mohan:
Novel Design for Binary to RNS Converters. ISCAS 1994: 357-360 - 1987
- [j2]P. V. Ananda Mohan:
New structures for MOSFET-C filters. Proc. IEEE 75(7): 957-960 (1987) - 1985
- [j1]P. V. Ananda Mohan:
Active filter design using cascaded identical low-order (≥ 2) filter sections. Proc. IEEE 73(10): 1525-1526 (1985)
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