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Kewal K. Saluja
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Publications
- 2012
- [c138]Warin Sootkaneung, Kewal K. Saluja:
Impact of Body Bias Based Leakage Power Reduction on Soft Error Rate. VLSI Design 2012: 74-79 - 2011
- [c129]Warin Sootkaneung, Kewal K. Saluja:
Soft error reduction through gate input dependent weighted sizing in combinational circuits. ISQED 2011: 603-610 - 2010
- [c124]Warin Sootkaneung, Kewal K. Saluja:
Gate input reconfiguration for combating soft errors in combinational circuits. DSN Workshops 2010: 107-112 - [c117]Warin Sootkaneung, Kewal K. Saluja:
On techniques for handling soft errors in digital circuits. ITC 2010: 744-752 - 2008
- [c101]Kewal K. Saluja, Shriram Vijayakumar, Warin Sootkaneung, Xaingning Yang:
NBTI Degradation: A Problem or a Scare? VLSI Design 2008: 137-142
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