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Chuan-lin Wu
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Publications
- 1997
- [c33]W. Lynn Gallagher, Chuan-lin Wu:
Evaluation of a memory hierarchy for the MTS multithreaded processor. ICPADS 1997: 346-351 - 1995
- [j19]Chao Chi Tong, Chuan-lin Wu:
Routing in a Three-Dimensional Chip. IEEE Trans. Computers 44(1): 106-117 (1995) - [c32]Jin Li, Chuan-lin Wu:
A modular growth architecture for an ATM switch. ICCCN 1995: 420 - [c31]Jin Li, Chuan-lin Wu:
A novel architecture for an ATM switch. ICCD 1995: 340-345 - [c30]Jin Li, Chuan-lin Wu:
Design and implementation of a multicast-buffer ATM switch. ICNP 1995: 84-91 - 1993
- [c27]Yi-Hsiu Wei, Chuan-lin Wu:
Integrating RPC and Message Passing for Distributed Programming. DCE Workshop 1993: 192-206 - 1992
- [c24]Thang Tran, Chuan-lin Wu:
Limitation of superscalar microprocessor performance. MICRO 1992: 33-36 - 1991
- [j15]Lingtao Wang, Chuan-lin Wu:
Distributed Instruction Set Computer Architecture. IEEE Trans. Computers 40(8): 915-934 (1991) - [j13]Albert C. Chen, Chuan-lin Wu:
A Parallel Execution Model of Logic Programs. IEEE Trans. Parallel Distributed Syst. 2(1): 79-92 (1991) - [c23]Karam Mossaad, Chuan-lin Wu:
Parallel resource allocation algorithms on macro-pipelined architectures. ACM Conference on Computer Science 1991: 299-310 - [c21]R. Guru Prasadh, Chuan-lin Wu:
A Benchmark Evaluation of a Multi-threaded RISC Processor Architecture. ICPP (1) 1991: 84-91 - [c20]Thang Tran, Chuan-lin Wu:
Microprocessor Architecture with Multi-Bit Scoreboard Concurrency Control. ICPP (1) 1991: 128-135 - 1988
- [c17]Chung-Yang Chiang, Chuan-lin Wu:
Adaptive Checkpointing and Rollback in Multiprocessor Systems. ICPP (1) 1988: 400-403 - [c16]Lingtao Wang, Chuan-lin Wu:
Distributed Instruction Set Computer. ICPP (1) 1988: 426-429 - [c15]Lingtao Wang, Chuan-lin Wu:
I-NET mechanism for issuing multiple instructions. SC 1988: 88-95 - 1986
- [c12]Chung-Yang Chiang, Chuan-lin Wu:
Fail Safe Distributed Fault Diagnosis of Multiprocessor Systems. ICPP 1986: 358-365 - [c11]Karam Mossaad, Chuan-lin Wu:
Efficient Execution of Programs with Pipeline Configuration of Reconfigurable Multiprocessor. ICPP 1986: 552-554 - 1984
- [c8]Kuang-Cheng Ting, Chuan-lin Wu:
A versatile VLSI fast Fourier transform processor. AFIPS National Computer Conference 1984: 151-162
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