Siddika Berna Ors Yalcin

Ahmet Aris, Siddika Berna Örs, Gökay Saldamli: Architectures for Fast Modular Multiplication. DSD 2011: 434-437

Mehmet Soybali, Siddika Berna Örs, Gökay Saldamli: Implementation of a PUF Circuit on a FPGA. NTMS 2011: 1-5

Siddika Berna Ors Yalcin (Ed.): Radio Frequency Identification: Security and Privacy Issues - 6th International Workshop, RFIDSec 2010, Istanbul, Turkey, June 8-9, 2010, Revised Selected Papers. Lecture Notes in Computer Science 6370, Springer 2010, isbn 978-3-642-16821-5

Atilla Elçi, Oleg B. Makarevich, Mehmet A. Orgun, Alexander G. Chefranov, Josef Pieprzyk, Yuri Anatolievich Bryukhomitsky, Siddika Berna Örs (Eds.): Proceedings of the 2nd International Conference on Security of Information and Networks, SIN 2009, Gazimagusa, North Cyprus, October 6-10, 2009. ACM 2009, isbn 978-1-60558-412-6

Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle: Hardware implementation of an elliptic curve processor over GF(p) with Montgomery modular multiplier. IJES 3(4): 229-240 (2008)

Ali Can Atici, Lejla Batina, Junfeng Fan, Ingrid Verbauwhede, Siddika Berna Örs: Low-cost implementations of NTRU for pervasive security. ASAP 2008: 79-84

Keklik Alptekin Bayam, Siddika Berna Örs: Differential Power Analysis resistant hardware implementation of the RSA cryptosystem. ISCAS 2008: 3314-3317

Ilker Yavuz, Siddika Berna Ors Yalcin, Çetin Kaya Koç: FPGA Implementation of an Elliptic Curve Cryptosystem over GF(3^m). ReConFig 2008: 397-402

Elke De Mulder, Siddika Berna Örs, Bart Preneel, Ingrid Verbauwhede: Differential power and electromagnetic attacks on a FPGA implementation of elliptic curve cryptosystems. Computers & Electrical Engineering 33(5-6): 367-382 (2007)

Nele Mentens, Siddika Berna Örs, Bart Preneel, Joos Vandewalle: An FPGA Implementation of a Montgomery Multiplier Over GF(2^m). Computers and Artificial Intelligence 23(5): 487-499 (2004)

François-Xavier Standaert, Siddika Berna Örs, Bart Preneel: Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure? CHES 2004: 30-44

Lejla Batina, Geeke Bruin-Muurling, Siddika Berna Örs: Flexible Hardware Design for RSA and Elliptic Curve Cryptosystems. CT-RSA 2004: 250-263

François-Xavier Standaert, Siddika Berna Örs, Jean-Jacques Quisquater, Bart Preneel: Power Analysis Attacks Against FPGA Implementations of the DES. FPL 2004: 84-94

Nele Mentens, Siddika Berna Örs, Bart Preneel: An FPGA implementation of an elliptic curve processor GF(2^m). ACM Great Lakes Symposium on VLSI 2004: 454-457

Siddika Berna Örs, Frank K. Gürkaynak, Elisabeth Oswald, Bart Preneel: Power-Analysis Attack on an ASIC AES implementation. ITCC (2) 2004: 546-552

Lejla Batina, Siddika Berna Örs, Bart Preneel, Joos Vandewalle: Hardware architectures for public key cryptography. Integration 34(1-2): 1-64 (2003)

Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle: Hardware Implementation of an Elliptic Curve Processor over GF(p). ASAP 2003: 433-443

Siddika Berna Örs, Elisabeth Oswald, Bart Preneel: Power-Analysis Attacks on an FPGA - First Experimental Results. CHES 2003: 35-50

Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle: Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array. IPDPS 2003: 184

Siddika Berna Örs, Ahmet Dervisoglu: Modeling Bit Multiplication Blocks for DSP Applications Using VHDL. EUROMICRO 1999: 1402-1405