Norbert Wehn

Christian Weis, Igor Loi, Luca Benini, Norbert Wehn: Exploration and Optimization of 3-D Integrated DRAM Subsystems. IEEE Trans. on CAD of Integrated Circuits and Systems 32(4): 597-610 (2013)

Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens: System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs. DATE 2013: 236-241

Christian de Schryver, Pedro Torruella, Norbert Wehn: A multi-level Monte Carlo FPGA accelerator for option pricing in the Heston model. DATE 2013: 248-253

Christian de Schryver, Daniel Schmidt, Norbert Wehn, Elke Korn, Henning Marxen, Anton Kostiuk, Ralf Korn: A Hardware Efficient Random Number Generator for Nonuniform Distributions with Arbitrary Precision. Int. J. Reconfig. Comp. 2012 (2012)

Philipp Schläfer, Christian Weis, Norbert Wehn, Matthias Alles: Design Space of Flexible Multigigabit LDPC Decoders. VLSI Design 2012 (2012)

Christian Brehm, Matthias May, Christina Gimmler, Norbert Wehn: A Case Study on Error Resilient Architectures for Wireless Communication. ARCS 2012: 13-24

Manil Dev Gomony, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens: DRAM selection and configuration for real-time mobile systems. DATE 2012: 51-56

Christian Weis, Igor Loi, Luca Benini, Norbert Wehn: An energy efficient DRAM subsystem for 3D integrated SoCs. DATE 2012: 1138-1141

Ivan Shcherbakov, Norbert Wehn: A Parallel Adaptive Range Coding Compressor: Algorithm, FPGA Prototype, Evaluation. DCC 2012: 119-128

Jörg Henkel, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel, Norbert Wehn: Dependable embedded systems: The German research foundation DFG priority program SPP 1500. European Test Symposium 2012: 1

Michael Arndt, Karsten Berns, Sebastian Wille, Norbert Wehn, Luiza de Souza: Combining robotic frameworks with a smart environment framework: MCA2/SimVis3D and TinySEP. UbiComp 2012: 818-825

Ivan Shcherbakov, Christian Weis, Norbert Wehn: A High-Performance FPGA-Based Implementation of the LZSS Compression Algorithm. IPDPS Workshops 2012: 449-453

Christina Gimmler-Dumont, Philipp Schläfer, Norbert Wehn: FPGA-based rapid prototyping platform for MIMO-BICM design space exploration. ReConFig 2012: 1-7

Christina Gimmler-Dumont, Christian Brehm, Norbert Wehn: Reliability study on system memories of an iterative MIMO-BICM system. VLSI-SoC 2012: 255-258

Frank Kienle, Norbert Wehn, Heinrich Meyr: On Complexity, Energy- and Implementation-Efficiency of Channel Decoders. IEEE Transactions on Communications 59(12): 3301-3310 (2011)

Norbert Wehn: Reliability: A Cross-Disciplinary and Cross-Layer Approach. Asian Test Symposium 2011: 496-497

Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich: Design and architectures for dependable embedded systems. CODES+ISSS 2011: 69-78

Christian Weis, Norbert Wehn, Igor Loi, Luca Benini: Design space exploration for 3D-stacked DRAMs. DATE 2011: 389-394

Ivan Shcherbakov, Christian Weis, Norbert Wehn: Bringing C++ productivity to VHDL world: From language definition to a case study. FDL 2011: 1-7

Christian de Schryver, Matthias Jung, Norbert Wehn, Henning Marxen, Anton Kostiuk, Ralf Korn: Energy Efficient Acceleration and Evaluation of Financial Computations towards Real-Time Pricing. KES (4) 2011: 177-186

Christian de Schryver, Ivan Shcherbakov, Frank Kienle, Norbert Wehn, Henning Marxen, Anton Kostiuk, Ralf Korn: An Energy Efficient FPGA Accelerator for Monte Carlo Option Pricing with the Heston Model. ReConFig 2011: 468-474

Christian Brehm, Norbert Wehn, Sacha Loitz, Wolfgang Kunz: Validation of channel decoding ASIPs a case study. International Symposium on Rapid System Prototyping 2011: 74-78

Marco Platzner, Jürgen Teich, Norbert Wehn (Eds.): Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications. Springer 2010, isbn 978-9-04-813484-7

Akin Tanatmis, Stefan Ruzika, Horst W. Hamacher, Mayur Punekar, Frank Kienle, Norbert Wehn: A separation algorithm for improved LP-decoding of linear block codes. IEEE Transactions on Information Theory 56(7): 3277-3289 (2010)

Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich: A rapid prototyping system for error-resilient multi-processor systems-on-chip. DATE 2010: 375-380

Matthias May, Thomas Ilnseher, Norbert Wehn, Wolfgang Raab: A 150Mbit/s 3GPP LTE Turbo code decoder. DATE 2010: 1420-1425

Sacha Loitz, Markus Wedler, Dominik Stoffel, Christian Brehm, Norbert Wehn, Wolfgang Kunz: Complete Verification of Weakly Programmable IPs against Their Operational ISA Model. FDL 2010: 29-36

Muhammad Anis, Maurits Ortmanns, Norbert Wehn: Fully integrated UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices. ISCAS 2010: 1213-1215

Fabien Clermidy, Christian Bernard, Romain Lemaire, Jérôme Martin, Ivan Miro Panades, Yvain Thonnart, Pascal Vivet, Norbert Wehn: A 477mW NoC-based digital baseband for MIMO 4G SDR. ISSCC 2010: 278-279

Sebastian Wille, Norbert Wehn, Ivan Martinovic, Simon Kunz, Peter Göhner: AmICA - A Flexible, Compact, Easy-to-Program and Low-Power WSN Platform. MobiQuitous 2010: 381-382

Christina Gimmler, Timo Lehnigk-Emden, Norbert Wehn: Low-complexity iteration control for MIMO-BICM systems. PIMRC 2010: 241-246

Christian de Schryver, Daniel Schmidt, Norbert Wehn, Elke Korn, Henning Marxen, Ralf Korn: A New Hardware Efficient Inversion Based Random Number Generator for Non-uniform Distributions. ReConFig 2010: 190-195

Gabriel Luca Nazar, Christina Gimmler, Norbert Wehn: Implementation comparisons of the QR decomposition for MIMO detection. SBCCI 2010: 210-214

Matthias Alles, Timo Vogt, Christian Brehm, Norbert Wehn: FlexiChaP: A Dynamically Reconfigurable ASIP for Channel Decoding for Future Mobile Systems. Dynamically Reconfigurable Systems 2010: 293-314

Frank Kienle, Norbert Wehn, Heinrich Meyr: On Complexity, Energy- and Implementation-Efficiency of Channel Decoders. CoRR abs/1003.3792 (2010)

Zoltán Herczeg, Daniel Schmidt, Ákos Kiss, Norbert Wehn, Tibor Gyimóthy: Energy simulation of embedded XScale systems with XEEMU. J. Embedded Computing 3(3): 209-219 (2009)

Daniel Schmidt, Matthias Berning, Norbert Wehn: Error correction in single-hop wireless sensor networks - A case study. DATE 2009: 1296-1301

Stefan Müller, Manuel Schreger, Marten Kabutz, Matthias Alles, Frank Kienle, Norbert Wehn: A novel LDPC decoder for DVB-S2 IP. DATE 2009: 1308-1313

Stefan Ruzika, Akin Tanatmis, Frank Kienle, Horst W. Hamacher, Norbert Wehn, Mayur Punekar: Valid inequalities for binary linear codes. ISIT 2009: 2216-2220

Daniel Schmidt, Norbert Wehn: DRAM power management and energy consumption: a critical assessment. SBCCI 2009

Christian Neeb, Norbert Wehn: Designing efficient irregular networks for heterogeneous systems-on-chip. Journal of Systems Architecture - Embedded Systems Design 54(3-4): 384-396 (2008)

Timo Vogt, Norbert Wehn: A Reconfigurable ASIP for Convolutional and Turbo Decoding in an SDR Environment. IEEE Trans. VLSI Syst. 16(10): 1309-1320 (2008)

Timo Vogt, Norbert Wehn: A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment. DATE 2008: 38-43

Matthias May, Matthias Alles, Norbert Wehn: A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder. DATE 2008: 456-461

Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Götz Kappen, Tobias G. Noll: Application-specific reconfigurable processors. FPL 2008: 350

Muhammad Anis, Reinhard Tielert, Norbert Wehn: 3.1-to-7GHz UWB impulse radio transceiver front-end based on statistical correlation technique. ISCAS 2008: 664-667

Sacha Loitz, Markus Wedler, Christian Brehm, Timo Vogt, Norbert Wehn, Wolfgang Kunz: Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking. SASP 2008: 48-54

Frank Kienle, Norbert Wehn: Macro Interleaver Design for Bit Interleaved Coded Modulation with Low-Density Parity-Check Codes. VTC Spring 2008: 763-766

Akin Tanatmis, Stefan Ruzika, Horst W. Hamacher, Mayur Punekar, Frank Kienle, Norbert Wehn: A Separation Algorithm for Improved LP-Decoding of Linear Block Codes. CoRR abs/0812.2559 (2008)

Torben Brack, Matthias Alles, Timo Lehnigk-Emden, Frank Kienle, Norbert Wehn, Nicola E. L'Insalata, Francesco Rossi, Massimo Rovini, Luca Fanucci: Low complexity LDPC code decoders for next generation standards. DATE 2007: 331-336

Matthias May, Christian Neeb, Norbert Wehn: Evaluation of High Throughput Turbo-Decoder Architectures. ISCAS 2007: 2770-2773

Zoltán Herczeg, Ákos Kiss, Daniel Schmidt, Norbert Wehn, Tibor Gyimóthy: XEEMU: An Improved XScale Power Simulator. PATMOS 2007: 300-309

Matthias Alles, Torben Brack, Norbert Wehn: A Reliability-Aware LDPC Code Decoding Algorithm. VTC Spring 2007: 1544-1548

Torben Brack, Matthias Alles, Timo Lehnigk-Emden, Frank Kienle, Norbert Wehn, Friedbert Berens, Andreas Ruegg: A Survey on LDPC Codes and Decoders for OFDM-based UWB Systems. VTC Spring 2007: 1549-1553

Norbert Wehn, Timo Vogt, Christian Neeb: A Reconfigurable Outer Modem Platform for Future Communications Systems. Dynamically Reconfigurable Architectures 2006

Torben Brack, Frank Kienle, Norbert Wehn: Disclosing the LDPC code decoder design space. DATE 2006: 200-205

Christian Neeb, Norbert Wehn: Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip. DSD 2006: 665-672

Norbert Wehn: Advanced Channel Decoding Algorithms and Their Implementation for Future Communication Systems. ISVLSI 2006: 3

Torben Brack, Matthias Alles, Frank Kienle, Norbert Wehn: A Synthesizable IP Core for WIMAX 802.16E LDPC Code Decoding. PIMRC 2006: 1-5

Timo Vogt, Christian Neeb, Norbert Wehn: A Reconfigurable Multi-Processor Platform for Convolutional and Turbo Decoding. ReCoSoC 2006: 16-23

Timo Vogt, Norbert Wehn: A Reconfigurable Applcation Specific Instruction Set Processor for Viterbi and Log-MAP Decoding. SiPS 2006: 142-147

Frank Kienle, Timo Lehnigk-Emden, Norbert Wehn: Fast convergence algorithm for LDPC Codes. VTC Spring 2006: 2393-2397

Frank Gilbert, Timo Vogt, Norbert Wehn: Architecture-driven voltage scaling for high-throughput turbo-decoders. J. Embedded Computing 1(3): 391-402 (2005)

Michael J. Thul, Frank Gilbert, Timo Vogt, Gerd Kreiselmaier, Norbert Wehn: A Scalable System Architecture for High-Throughput Turbo-Decoders. VLSI Signal Processing 39(1-2): 63-77 (2005)

Norbert Wehn: Power Optimization in advanced Channel Coding. Power-aware Computing Systems 2005

Frank Kienle, Torben Brack, Norbert Wehn: A Synthesizable IP Core for DVB-S2 LDPC Code Decoding. DATE 2005: 100-105

Christian Neeb, Norbert Wehn: Energieminimierung von Basisbandsignalverarbeitungsalgorithmen auf programmierbaren Plattformen. GI Jahrestagung (1) 2005: 442

Christian Neeb, Michael J. Thul, Norbert Wehn: Network-on-chip-centric approach to interleaving in high throughput channel decoders. ISCAS (2) 2005: 1766-1769

Frank Kienle, Norbert Wehn: Design methodology for IRA codes. ASP-DAC 2004: 459-462

Friedbert Berens, Gerd Kreiselmaier, Norbert Wehn: Channel Decoder Architecture for 3G Mobile Wireless Terminals. DATE 2004: 192-197

Armin Wellig, Julien Zory, Norbert Wehn: Energy- and Area-Efficient Deinterleaving Architecture for High-Throughput Wireless Applications. PATMOS 2004: 218-227

Timo Vogt, Norbert Wehn, Philippe Alves: A multi-standard channel-decoder for base-station applications. SBCCI 2004: 192-197

Michael J. Thul, Norbert Wehn: FPGA implementation of parallel turbo-decoders. SBCCI 2004: 198-203

Norbert Wehn: System-on-Chip - Ein Sonderheft anlässlich des 60. Geburtstages von Prof. Dr. Dr. h.c. mult. Manfred Glesner. it - Information Technology 45(6): 309 (2003)

Norbert Wehn: Vergleich von Hardware- und Software-Implementierungen in der digitalen Kommunikation am Beispiel der Kanalcodierung (Hardware-/Software Trade-Offs in Digital Communication Systems with Special Emphasis on Channel-Coding). it - Information Technology 45(6): 336-343 (2003)

Frank Gilbert, Michael J. Thul, Norbert Wehn: Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors . DATE 2003: 10356-10363

Frank Gilbert, Norbert Wehn: Architecture-Driven Voltage Scaling for High-Throughput Turbo-Decoders. PATMOS 2003: 379-388

Heiko Michel, Alexander Worm, Norbert Wehn, Michael Münch: Hardware/Software Trade-Offs for Advanced 3G Channel Coding. DATE 2002: 396-401

Michael J. Thul, Timo Vogt, Frank Gilbert, Norbert Wehn: Evaluation of algorithm optimizations for low-power Turbo-Decoder implementations. ICASSP 2002: 3101-3104

Michael J. Thul, Norbert Wehn, L. P. Rao: Enabling high-speed turbo-decoding through concurrent interleaving. ISCAS (1) 2002: 897-900

Doris Keitel-Schulz, Norbert Wehn: Embedded DRAM Development: Technology, Physical Design, and Application Issues. IEEE Design & Test of Computers 18(3): 7-15 (2001)

Heiko Michel, Norbert Wehn: Turbo-decoder quantization for UMTS. IEEE Communications Letters 5(2): 55-57 (2001)

Frank Gilbert, Alexander Worm, Norbert Wehn: Low power implementation of a turbo-decoder on programmable architectures. ASP-DAC 2001: 400-403

Alexander Worm, Holger Lamm, Norbert Wehn: Design of low-power high-speed maximum a priori decoder architectures. DATE 2001: 258-267

Doris Keitel-Schulz, Norbert Wehn, Francky Catthoor, Preeti Ranjan Panda: Embedded Memories in System Design: Technology, Application, Design and Tools. VLSI Design 2001: 5-6

Alexander Worm, Holger Lamm, Norbert Wehn: Vlsi Architectures For High-Speed Map Decoders. VLSI Design 2001: 446-453

Alexander Worm, Peter Hoeher, Norbert Wehn: Turbo-decoding without SNR estimation. IEEE Communications Letters 4(6): 193-195 (2000)

Michael Münch, Norbert Wehn, Bernd Wurth, Renu Mehra, Jim Sproch: Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths. DATE 2000: 624-631

Norbert Wehn, Søren Hein: Embedded DRAM Architectural Trade-Offs. DATE 1998: 704-708

Doris Keitel-Schulz, Norbert Wehn: Issues in Embedded DRAM Development and Applications. ISSS 1998: 23-30

Michael Münch, Norbert Wehn, Manfred Glesner: An efficient ILP-based scheduling algorithm for control-dominated VHDL descriptions. ACM Trans. Design Autom. Electr. Syst. 2(4): 344-364 (1997)

Michael Münch, Manfred Glesner, Norbert Wehn: An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions. ISSS 1996: 45-50

U. Zahm, Thomas Hollstein, Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner: Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. FPL 1995: 241-250

Régis Leveugle, Zahava Koren, Israel Koren, Gabriele Saucier, Norbert Wehn: The Hyeti Defect Tolerant Microprocessor: A Practical Experiment and its Cost-Effectiveness Analysis. IEEE Trans. Computers 43(12): 1398-1406 (1994)

Norbert Wehn, J. Biesenack, Peter Duzy, T. Langmaier, Michael Münch, Michael Pilsl, S. Rumler: Scheduling of behavioral VHDL by retiming techniques. EURO-DAC 1994: 546-551

Bernd Wurth, Norbert Wehn: Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization. EDAC-ETC-EUROASIC 1994: 630-634

J. Biesenack, M. Koster, A. Langmaier, S. Ledeux, S. Marz, Michael Payer, Michael Pilsl, S. Rumler, H. Soukup, Norbert Wehn, Peter Duzy: The Siemens high-level synthesis system CALLAS. IEEE Trans. VLSI Syst. 1(3): 244-253 (1993)

Norbert Wehn, Manfred Glesner, C. Vielhauer: Estimating lower hardware bounds in high-level synthesis. VLSI 1993: 261-270

J. Biesenack, Norbert Wehn, A. Stoll, Michael Payer: Data Part Optimizations in the CALLAS Synthesis Environment. Synthesis for Control Dominated Circuits 1992: 263-274

Norbert Wehn, J. Biesenack, Michael Pilsl: A New Approach to Multiplexer Minimisation in the CALLAS Synthesis Environment. VLSI 1991: 203-213

A. Laudenbach, Manfred Glesner, Norbert Wehn: A VLSI System Design for the Control of High Performance Combustion Engines. VLSI 1991: 247-256

Norbert Wehn, Manfred Glesner, A. Kister, S. Kastner: Timing Driven Partitioning of Combinational Logic. Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme 1990: 42-51

Norbert Wehn, Manfred Glesner, K. Caesar, P. Mann, A. Roth: A Defect-Tolerant and Fully Testable PLA. DAC 1988: 22-33

Johannes Schuck, Norbert Wehn, Manfred Glesner, G. Kamp: The ALGIC Silicon Compiler System: Implementation, Design Experience and Results. DAC 1987: 370-375