Serge Weber

Michael Guarisco, Eric Dabellani, Nicolas Marques, Hassan Rabah, Yves Berviller, Serge Weber: An efficient VLSI implementation of H.264/AVC intra-frame transcoder. ICECS 2011: 1-4

Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber: CuNoC: A dynamic scalable communication structure for dynamically reconfigurable FPGAs. Microprocessors and Microsystems - Embedded Hardware Design 33(1): 24-36 (2009)

Camel Tanougast, Michael Janiaut, Yves Berviller, Hassan Rabah, Serge Weber, Ahmed Bouridane: An Embedded and Programmable System Based FPGA for Real Time MPEG Stream Buffer Analysis. IEEE Trans. Circuits Syst. Video Techn. 19(2): 237-249 (2009)

Slavisa Jovanovic, Camel Tanougast, Serge Weber, Christophe Bobda: A new deadlock-free fault-tolerant routing algorithm for NoC interconnections. FPL 2009: 326-331

Michael Guarisco, Hassan Rabah, Yves Berviller, Serge Weber, Said Belkouch: FPGA-based SoC for transcoding H264/AVC-SVC with low latency and high bitrate entropy coding. SoCC 2009: 423-426

Slavisa Jovanovic, Camel Tanougast, Serge Weber: A New Self-Managing Hardware Design Approach for FPGA-based Reconfigurable Systems. ARC 2008: 159-170

Slavisa Jovanovic, Camel Tanougast, Serge Weber: A new high-performance scalable dynamic interconnection for FPGA-based reconfigurable systems. ASAP 2008: 61-66

Xun Zhang, Hassan Rabah, Serge Weber: Dynamic Slowdown and Partial Reconfiguration to Optimize Energy in FPGA Based Auto-adaptive SoPC. DELTA 2008: 153-157

Camel Tanougast, Serge Weber, Gilles Millerioux, Jamal Daafouz, Ahmed Bouridane: VLSI Architecture and FPGA Implementation of a Hybrid Message-Embedded Self-Synchronizing Stream Cipher. DELTA 2008: 386-389

Xun Zhang, Hassan Rabah, Serge Weber: An Auto-adaptation Method for Dynamically Reconfigurable System-on-Chip. ISVLSI 2008: 499-502

Ting Liu, Camel Tanougast, Serge Weber: A framework of architectural synthesis for dynamically reconfigurable FPGAs. SoCC 2008: 283-286

Oscar Pérez, Yves Berviller, Camel Tanougast, Serge Weber: The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation. J. UCS 13(3): 349-362 (2007)

Camel Tanougast, Serge Weber, Gilles Millerioux, Ahmed Bouridane, Jamal Daafouz: An Fpga implementation of the HME self-synchronizing stream cipher for Enhanced security and performance. AHS 2007: 110-118

Xun Zhang, Hassan Rabah, Serge Weber: Auto-adaptive reconfigurable architecture for scalable multimedia applications. AHS 2007: 139-145

Slavisa Jovanovic, Camel Tanougast, Serge Weber: A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems. AHS 2007: 358-364

Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber: CuNoC: A Scalable Dynamic NoC for Dynamically Reconfigurable FPGAs. FPL 2007: 753-756

Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber: A Dynamic Communication Structure for Dynamically Reconfigurable FPGAs. ReCoSoC 2007: 98-105

Michael Janiaut, Camel Tanougast, Hassan Rabah, Yves Berviller, Christian Mannino, Serge Weber: Configurable hardware implementation of a conceptual decoder for a real-time MPEG-2 analysis. FPL 2005: 386-390

Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber: FPGA Implementation of a Novel Architecture for PCR Related Measurements In DVB-T. ESA/VLSI 2004: 606-610

Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber: FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-T. FPL 2004: 1027-1031

Camel Tanougast, Yves Berviller, Christian Mannino, Hassan Rabah, Michael Janiaut, Serge Weber: SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation. IEEE International Workshop on Rapid System Prototyping 2004: 157-163

Camel Tanougast, Yves Berviller, Serge Weber, Philippe Brunet: A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems. EURASIP J. Adv. Sig. Proc. 2003(6): 494-501 (2003)

Camel Tanougast, Yves Berviller, Philippe Brunet, Serge Weber, Hassan Rabah: Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system. Microprocessors and Microsystems 27(3): 115-130 (2003)

Hassan Rabah, Hervé Mathias, Serge Weber, Eril Mozef, Camel Tanougast: Linear array processors with multiple access modes memory for real-time image processing. Real-Time Imaging 9(3): 205-213 (2003)

Camel Tanougast, Yves Berviller, Philippe Brunet, Serge Weber: Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design. IPDPS 2003: 178

Philippe Brunet, Camel Tanougast, Yves Berviller, Serge Weber: Hardware Partitioning Software for Dynamically Reconfigurable SoC Design. IWSOC 2003: 106-111

Hassan Rabah, Hervé Mathias, Eril Mozef, Domingo Torres, Serge Weber: Linear array processors with multiple access modes memory for real-time image processing. APCCAS (1) 2002: 203-206

Sylvain Poussier, Hassan Rabah, Serge Weber: SOPC-based Embedded Smart Strain Gage Sensor. FPL 2002: 1131-1134

Camel Tanougast, Yves Berviller, Serge Weber: Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation. IPDPS Workshops 2000: 959-965

Domingo Torres, Hervé Mathias, Hassan Rabah, Serge Weber: SIMD/restricted MIMD parallel architecture for Image Processing Based on a New Design of a Multi-mode Access Memory. PDPTA 1999: 567-570

Eril Mozef, Serge Weber, Jamal Jaber, Claude Bataille: LAPCAM, Linear Array of Processors Using Content-Addressable Memories: A New Design of Machine Vision for Parallel Image Computations. MVA 1996: 166-169