Zeyi Wang Coauthor index pubzone.org

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j7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Wenjian Yu, Xiren Wang, Zuochang Ye, Zeyi Wang: Efficient Extraction of Frequency-Dependent Substrate Parasitics Using Direct Boundary Element Method. IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1508-1513 (2008)
c20Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Fang Gong, Wenjian Yu, Zeyi Wang, Zhiping Yu, Changhao Yan: Efficient techniques for 3-D impedance extraction using mixed boundary element method. ASP-DAC 2008: 158-163
c19Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Wangyang Zhang, Wenjian Yu, Zeyi Wang, Zhiping Yu, Rong Jiang, Jinjun Xiong: An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation. DATE 2008: 580-585
2007
c18Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Xiren Wang, Wenjian Yu, Zeyi Wang: A New Boundary Element Method for Multiple-Frequency Parameter Extraction of Lossy Substrates. ASP-DAC 2007: 62-67
2006
j6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Wenjian Yu, Mengsheng Zhang, Zeyi Wang: Efficient 3-D extraction of interconnect capacitance considering floating metal fills with boundary element method. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 12-18 (2006)
j5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Xiren Wang, Wenjian Yu, Zeyi Wang: Efficient Direct Boundary Element Method for Resistance Extraction of Substrate With Arbitrary Doping Profile. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 3035-3042 (2006)
c17Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Mengsheng Zhang, Wenjian Yu, Yu Du, Zeyi Wang: An efficient algorithm for 3-D reluctance extraction considering high frequency effect. ASP-DAC 2006: 521-526
c16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Xiren Wang, Wenjian Yu, Zeyi Wang: A new boundary element method for accurate modeling of lossy substrates with arbitrary doping profiles. ASP-DAC 2006: 683-688
c15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Changhao Yan, Wenjian Yu, Zeyi Wang: Calculating frequency-dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method. ASP-DAC 2006: 844-849
c14Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Changhao Yan, Wenjian Yu, Zeyi Wang: A Mixed Boundary Element Method for Extracting Frequency- Inductances of 3D Interconnects. ISQED 2006: 709-716
2005
j4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Xiren Wang, Deyan Liu, Wenjian Yu, Zeyi Wang: Improved Boundary Element Method for Fast 3-D Interconnect Resistance Extraction. IEICE Transactions 88-C(2): 232-240 (2005)
c13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Xiren Wang, Wenjian Yu, Zeyi Wang: Substrate resistance extraction with direct boundary element method. ASP-DAC 2005: 208-211
c12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Xiren Wang, Wenjian Yu, Zeyi Wang, Xianlong Hong: An improved direct boundary element method for substrate coupling resistance extraction. ACM Great Lakes Symposium on VLSI 2005: 84-87
2004
j3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Zhaozhi Yang, Zeyi Wang: New Multipole Method for 3-D Capacitance Extraction. J. Comput. Sci. Technol. 19(4): 544-549 (2004)
c11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Liu Yang, Xiaobo Guo, Zeyi Wang: An efficient method MEGCR for solving systems with multiple right-hand sides in 3-D parasitic inductance extraction. ASP-DAC 2004: 702-706
c10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Xiren Wang, Deyan Liu, Wenjian Yu, Zeyi Wang: Fast and accurate extraction of 3-D interconnect resistance: improved quasi-multiple medium accelerated BEM method. ASP-DAC 2004: 707-709
2003
c9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Taotao Lu, Zeyi Wang, Xianlong Hong: BBE: hierarchical computation of 3-D interconnect capacitance with BEM block extraction. ASP-DAC 2003: 255-260
c8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Wenjian Yu, Zeyi Wang, Xianlong Hong: Enhanced QMM-BEM Solver for 3-D Finite-Domain Capacitance Extraction with Multilayered Dielectrics. ICCD 2003: 58-63
2002
c7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Shuzhou Fang, Zeyi Wang, Xianlong Hong: A 3-D Minimum-Order Boundary Integral Equation Technique to Extract Frequency-Dependant Inductance and Resistance in ULSI. VLSI Design 2002: 305-310
2001
c6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Zhaozhi Yang, Zeyi Wang, Shuzhou Fang: A virtual 3-D multipole accelerated extractor for VLSI parasitic interconnect capacitance. ASP-DAC 2001: 214-218
c5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Wenjian Yu, Zeyi Wang: An efficient quasi-multiple medium algorithm fo the capacitance extraction of actual 3-D VLSI interconnects. ASP-DAC 2001: 366-372
2000
c4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Jiangchun Gu, Zeyi Wang, Xianlong Hong: Hierarchical computation of 3-D interconnect capacitance using direct boundary element method. ASP-DAC 2000: 447-452
c3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Shuzhou Fang, Xiaobo Tang, Zeyi Wang, Xianlong Hong: A simplified hybrid method for calculating the frequency-dependent inductances of transmission lines with rectangular cross section. ASP-DAC 2000: 453-456
1999
c2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Jinsong Hou, Zeyi Wang, Xianlong Hong: The Hierarchical h-Adaptive 3-D Boundary Element Computation of VLSI Interconnect Capacitance. ASP-DAC 1999: 93-
1997
c1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Wenming Zhou, Zeyi Wang, Lan Rao: Parallel calculation of 3-D parasitic resistance and capacitance with linear boundary elements. ASP-DAC 1997: 339-343
1996
j2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Zeyi Wang, Yanhong Yuan, Qiming Wu: A parallel multipole accelerated 3-D capacitance simulator based on an improved model. IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1441-1450 (1996)
1992
j1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XML
Zeyi Wang, Qiming Wu: A two-dimensional resistance simulator using the boundary element method. IEEE Trans. on CAD of Integrated Circuits and Systems 11(4): 497-504 (1992)

Coauthor Index

1Yu Du
[c17]
2Shuzhou Fang
[c7] [c6] [c3]
3Fang Gong
[c20]
4Jiangchun Gu
[c4]
5Xiaobo Guo
[c11]
6Xianlong Hong
[c12] [c9] [c8] [c7] [c4] [c3] [c2]
7Jinsong Hou
[c2]
8Rong Jiang
[c19]
9Deyan Liu
[j4] [c10]
10Taotao Lu
[c9]
11Lan Rao
[c1]
12Xiaobo Tang
[c3]
13Xiren Wang
[j7] [c18] [j5] [c16] [j4] [c13] [c12] [c10]
14Qiming Wu
[j2] [j1]
15Jinjun Xiong
[c19]
16Changhao Yan
[c20] [c15] [c14]
17Liu Yang
[c11]
18Zhaozhi Yang
[j3] [c6]
19Zuochang Ye
[j7]
20Wenjian Yu
[j7] [c20] [c19] [c18] [j6] [j5] [c17] [c16] [c15] [c14] [j4] [c13] [c12] [c10] [c8] [c5]
21Zhiping Yu
[c20] [c19]
22Yanhong Yuan
[j2]
23Mengsheng Zhang
[j6] [c17]
24Wangyang Zhang
[c19]
25Wenming Zhou
[c1]

Colors in the list of coauthors

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