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 | 2009 | |
|---|---|---|
| c5 |      | Matthew M. Ziegler, Victor V. Zyuban, George Gristede, Milena Vratonjic, Joshua Friedrich: The opportunity cost of low power design: a case study in circuit tuning. ISLPED 2009: 133-138 |
| c4 | | Milena Vratonjic, Matthew M. Ziegler, George Gristede, Victor V. Zyuban, Thomas Mitchell, Ee Cho, Chandu Visweswariah, Vojin G. Oklobdzija: A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery (FPR). PATMOS 2009: 307-316 |
| 2008 | ||
| c3 | | Christophe Giacomotto, Mandeep Singh, Milena Vratonjic, Vojin G. Oklobdzija: Energy Efficiency of Power-Gating in Low-Power Clocked Storage Elements. PATMOS 2008: 268-276 |
| 2006 | ||
| c2 | | Milena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija: Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design. PATMOS 2006: 148-156 |
| 2005 | ||
| c1 | | Milena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija: Low- and Ultra Low-Power Arithmetic Units: Design and Comparison. ICCD 2005: 249-252 |
| 1 | Ee Cho | |
| 2 | Joshua Friedrich | |
| 3 | Christophe Giacomotto | |
| 4 | George Gristede | |
| 5 | Thomas Mitchell | |
| 6 | Vojin G. Oklobdzija | |
| 7 | Mandeep Singh | |
| 8 | Chandu Visweswariah | |
| 9 | Bart R. Zeydel | |
| 10 | Matthew M. Ziegler | |
| 11 | Victor V. Zyuban |
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