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Andrei Vladimirescu
2010 – today
- 2012
[c9]Adam Makosiej, Olivier Thomas, Andrei Vladimirescu, Amara Amara: Stability and yield-oriented ultra-low-power embedded 6T SRAM cell design optimization. DATE 2012: 93-98
[c8]Adam Makosiej, Rutwick Kumar Kashyap, Andrei Vladimirescu, Amara Amara, Costin Anghel: A 32nm tunnel FET SRAM for ultra low leakage. ISCAS 2012: 2517-2520- 2010
[c7]Olivier Thomas, Jean-Philippe Noel, Claire Fenouillet-Béranger, M.-A. Jaud, J. Dura, P. Perreau, Frédéric Boeuf, François Andrieu, D. Delprat, F. Boedt, Konstantin Bourdelle, Bich-Yen Nguyen, Andrei Vladimirescu, Amara Amara: 32nm and beyond Multi-VT Ultra-Thin Body and BOX FDSOI: From device to circuit. ISCAS 2010: 1703-1706
2000 – 2009
- 2009
[c6]Piotr Nasalski, Adam Makosiej, Bastien Giraud, Andrei Vladimirescu, Amara Amara: SRAM Voltage and Current Sense Amplifiers in sub-32nm Double-gate CMOS Insensitive to Process Variations and Transistor Mismatch. ISCAS 2009: 3170-3173- 2008
[j4]David T. Yeh, Jonathan S. Abel, Andrei Vladimirescu, Julius O. Smith: Numerical Methods for Simulation of Guitar Distortion Circuits. Computer Music Journal 32(2): 23-42 (2008)- 2007
[c5]Bastien Giraud, Amara Amara, Andrei Vladimirescu: A Comparative Study of 6T and 4T SRAM Cells in Double-Gate CMOS with Statistical Variation. ISCAS 2007: 3022-3025- 2006
[c4]Andrei Vladimirescu, Radu Zlatanovici, Paul G. A. Jespers: Analog circuit synthesis using standard EDA tools. ISCAS 2006- 2005
[j3]Huifang Qin, Yu Cao, Dejan Markovic, Andrei Vladimirescu, Jan M. Rabaey: Standby supply voltage minimization for deep sub-micron SRAM. Microelectronics Journal 36(9): 789-800 (2005)- 2004
[j2]Alexandre Valentian, Olivier Thomas, Andrei Vladimirescu, Amara Amara: Modeling subthreshold SOI logic for static timing analysis. IEEE Trans. VLSI Syst. 12(6): 662-669 (2004)
[c3]Huifang Qin, Yu Cao, Dejan Markovic, Andrei Vladimirescu, Jan M. Rabaey: SRAM Leakage Suppression by Minimizing Standby Supply Voltage. ISQED 2004: 55-60- 2002
[c2]Razvan Ionita, Andrei Vladimirescu, Paul G. A. Jespers: Automated Design Methodology for CMOS Analog Circuit Blocks in Complex Systems. PATMOS 2002: 487-494
1990 – 1999
- 1991
[j1]John H. Chan, Andrei Vladimirescu, Xiao-Chun Gao, Peter Liebmann, John Valainis: Nonlinear transformer model for circuit simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 10(4): 476-482 (1991)
1980 – 1989
- 1987
[c1]Andrei Vladimirescu, David Weiss, Manolis Katevenis, Zvika Bronstein, Alon Kifir, Karja Danuwidjaja, K. C. Ng, Niraj Jain, Steve Lass: A Vector Hardware Accelerator with Circuit Simulation Emphasis. DAC 1987: 89-94
Coauthor Index
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last updated on 2013-04-10 02:38 CEST by the dblp team



