Raoul Velazco

Wassim Mansour, Raoul Velazco: SEU Fault-Injection in VHDL-Based Processors: A Case Study. J. Electronic Testing 29(1): 87-94 (2013)

Gilles Foucard, Paul Peronnard, Raoul Velazco: Reliability Limits of TMR Implemented in a SRAM-based FPGA: Heavy Ion Measures vs. Fault Injection Predictions. J. Electronic Testing 27(5): 627-633 (2011)

Haissam Ziade, Rafic A. Ayoubi, Raoul Velazco, Tareck Idriss: A new fault injection approach to study the impact of bitflips in the configuration of SRAM-based FPGAs. Int. Arab J. Inf. Technol. 8(2): 155-162 (2011)

Guillaume Hubert, Raoul Velazco, Paul Peronnard: A generic platform for remote accelerated tests and high altitude SEU experiments on advanced ICs: Correlation with MUSCA SEP3 calculations. IOLTS 2009: 180

Vincent Pouget, Alexandre Douin, Gilles Foucard, Paul Peronnard, Dean Lewis, Pascal Fouillat, Raoul Velazco: Dynamic Testing of an SRAM-Based FPGA by Time-Resolved Laser Fault Injection. IOLTS 2008: 295-301

Raoul Velazco, R. Ecoffet, F. Faure: How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight. IOLTS 2005: 303-308

Haissam Ziade, Rafic A. Ayoubi, Raoul Velazco: A Survey on Fault Injection Techniques. Int. Arab J. Inf. Technol. 1(2): 171-186 (2004)

Lorena Anghel, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Raoul Velazco: Coupling Different Methodologies to Validate Obsolete Microprocessors. DFT 2004: 250-255

B. Nicolescu, Yvon Savaria, Raoul Velazco: Performance Evaluation and Failure Rate Prediction for the Soft Implemented Error Detection Technique. IOLTS 2004: 233-238

Raoul Velazco, Sana Rezgui, Haissam Ziade: Assessing the Soft Error Rate of Digital Architectures Devoted to Operate in Radiation Environment: A Case Studied. J. Electronic Testing 19(1): 83-90 (2003)

B. Nicolescu, Raoul Velazco: Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results. DATE 2003: 20057-20063

B. Nicolescu, Paul Peronnard, Raoul Velazco, Yvon Savaria: Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study. DFT 2003: 377-384

Lorena Anghel, Raoul Velazco, S. Saleh, S. Deswaertes, A. El Moucary: Preliminary Validation of an Approach Dealing with Processor Obsolescence. DFT 2003: 493-

B. Nicolescu, Yvon Savaria, Raoul Velazco: SIED: Software Implemented Error Detection. DFT 2003: 589-596

Monica Alderighi, Fabio Casini, Sergio D'Angelo, F. Faure, Marcello Mancini, Sandro Pastore, Giacomo R. Sechi, Raoul Velazco: Radiation test methodology for SRAM-based FPGAs by using THESIC. IOLTS 2003: 162

Raoul Velazco, Lorena Anghel, S. Saleh: A Methodology for Test Replacement Solutions of Obsolete Processors. IOLTS 2003: 209-213

Raoul Velazco, A. Corominas, P. Ferreyra: Injecting Bit Flip Faults by Means of a Purely Software Approach: A Case Studied. DFT 2002: 108-116

Gian-Carlo Cardarilli, F. Kaddour, A. Leandri, Marco Ottavi, Salvatore Pontarelli, Raoul Velazco: Bit Flip Injection in Processor-Based Architectures: A Case Study. IOLTW 2002: 117-

Fernanda Gusmão de Lima, Luigi Carro, Raoul Velazco, Ricardo Augusto da Luz Reis: Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller. IOLTW 2002: 194

F. Kaddour, Sana Rezgui, Raoul Velazco, S. Rodriguez, J. R. De Mingo: Error Rate Estimation for a Flight Application Using the CEU Fault Injection Approach. IOLTW 2002: 195

Érika F. Cota, Fernanda Lima, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis: Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. J. Electronic Testing 17(2): 149-161 (2001)

Ph. Cheynet, B. Nicolescu, Raoul Velazco, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante: System safety through automatic high-level code transformations: an experimental evaluation. DATE 2001: 297-301

Raoul Velazco, Régis Leveugle, O. Calvo: Upset-Like Fault Injection in VHDL Descriptions: A Method and Preliminary Results. DFT 2001: 259-

B. Nicolescu, Raoul Velazco, Matteo Sonza Reorda: Effectiveness and Limitations of Various Software Techniques for "Soft Error" Detection: A Comparative Study. IOLTW 2001: 172-177

Jim Chung, N. Derhacobian, Jean Gasiot, Michael Nicolaidis, David Towne, Raoul Velazco: Soft Errors and Tolerance for Soft Errors. VTS 2001: 279-280

Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Ph. Cheynet, B. Nicolescu, Raoul Velazco: Evaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures. IOLTW 2000: 17-

Fabian Vargas, Alexandre M. Amory, Raoul Velazco: Estimating Circuit Fault-Tolerance by Means of Transient-Fault Injection in VHDL. IOLTW 2000: 67-72

Raoul Velazco, Sana Rezgui: Transient Bitflip Injection in Microprocessor Embedded Applications. IOLTW 2000: 80-

Raoul Velazco, Ch. Godin, Ph. Cheynet, Santiago Torres-Alegre, Diego Andina, M. B. Gordon: Study of Two ANN Digital Implementations of a Radar Detector Candidate to an On-Board Satellite Experiment. IWANN (2) 1999: 615-624

Jean-Denis Muller, Ph. Cheynet, Raoul Velazco: Analysis and Improvement of Neural Network Robustness for On-Board Satellite Image Processing. ICANN 1997: 1211-1216

P. Caspi, J. Piotrowski, Raoul Velazco: An A Priori Approach to the Evaluation of Signature Analysis Efficiency. IEEE Trans. Computers 40(9): 1068-1071 (1991)

Raoul Velazco, Catherine Bellon, Bernard Martinet: Failure coverage of functional test methods: a comparative experimental evaluation. ITC 1990: 1012-1017

Catherine Bellon, Raoul Velazco, Haissam Ziade: Analysis of Experimental Results on Functional Testing and Diagnosis of Complex Circuits. ITC 1988: 64-72

Raoul Velazco, Haissam Ziade, E. Kolokithas: A Microprocessor Test Approach Allowing Fault Localization. ITC 1985: 737-743

Catherine Bellon, Raoul Velazco: Taking into account asynchronous signals in functional test of complex circuits. DAC 1984: 490-496

Catherine Bellon, Raoul Velazco: Hardware and Software Tools for Microprocessor Functional Test. ITC 1984: 804-820

Catherine Bellon, A. Liothin, S. Sadier, Gabriele Saucier, Raoul Velazco, Francois Grillot, M. Issenman: Automatic generation of microprocessor test programs. DAC 1982: 566-573