Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
Chien-Cheng Tseng
2010 – today
- 2013
[j31]Chien-Cheng Tseng, Su-Ling Lee: Designs of two-dimensional linear phase FIR filters using fractional derivative constraints. Signal Processing 93(5): 1141-1151 (2013)- [c33]Chien-Cheng Tseng, Su-Ling Lee: Design of two-dimensional notch filter using bandpass filter and fractional delay filter. ISCAS 2013: 89-92
- [c32]Chien-Cheng Tseng, Su-Ling Lee: Closed-form design of fractional order differentiator using discrete cosine transform. ISCAS 2013: 2609-2612
- [c31]Chien-Cheng Tseng, Su-Ling Lee: Computation of partial fractional derivative of digital image using discrete cosine transform. ISCAS 2013: 2828-2831
- 2012
- [j30]Chien-Cheng Tseng, Su-Ling Lee: Design of adjustable fractional order differentiator using expansion of ideal frequency response. Signal Processing 92(2): 498-508 (2012)
- [j29]Chien-Cheng Tseng, Su-Ling Lee: Design of linear phase FIR filters using fractional derivative constraints. Signal Processing 92(5): 1317-1327 (2012)
- [j28]Chien-Cheng Tseng, Su-Ling Lee: Design of Fractional Delay Filter Using Hermite Interpolation Method. IEEE Trans. on Circuits and Systems 59-I(7): 1458-1471 (2012)
- [j27]Chien-Cheng Tseng, Su-Ling Lee: Designs of Fixed-Fractional-Delay Filters Using Fractional-Derivative Constraints. IEEE Trans. on Circuits and Systems 59-II(10): 683-687 (2012)
- [c30]Chien-Cheng Tseng, Su-Ling Lee: Design and application of wide-range variable fractional delay filter. APCCAS 2012: 280-283
- [c29]Chien-Cheng Tseng, Su-Ling Lee: Weighted least squares design of wideband digital integrator using interlaced sampling method. APCCAS 2012: 292-295
- [c28]Chien-Cheng Tseng, Su-Ling Lee: Digital image sharpening using fractional derivative and mach band effect. ISCAS 2012: 2765-2768
- [c27]Chien-Cheng Tseng, Su-Ling Lee: Design of variable fractional order differentiator using a modular cascade structure. ISCAS 2012: 3174-3177
- 2011
- [j26]Chien-Cheng Tseng, Su-Ling Lee: Efficient Design and Implementation of Variable Fractional Delay Filters Using Differentiators. IEEE Trans. on Circuits and Systems 58-I(6): 1311-1322 (2011)
- [c26]Chien-Cheng Tseng, Su-Ling Lee: Design of variable fractional order differentiator using infinite product expansion. ECCTD 2011: 17-20
- [c25]Chien-Cheng Tseng, Su-Ling Lee: Automatic Container Code Recognition Using Compressed Sensing Method. MMM (2) 2011: 196-207
- [e3]Tzuu-Hseng S. Li, Kuo-Yang Tu, Ching-Chih Tsai, Chen-Chien Hsu, Chien-Cheng Tseng, Prahlad Vadakkepat, Jacky Baltes, John Anderson, Ching-Chang Wong, Norbert Jesse, Chung-Hsien Kuo, Haw Ching Yang (Eds.): Next Wave in Robotics - 14th FIRA RoboWorld Congress, FIRA 2011, Kaohsiung, Taiwan, August 26-30, 2011. Proceedings. Communications in Computer and Information Science 212, Springer 2011, ISBN 978-3-642-23146-9
- [e2]Kuo-Tien Lee, Wen-Hsiang Tsai, Hong-Yuan Mark Liao, Tsuhan Chen, Jun-Wei Hsieh, Chien-Cheng Tseng (Eds.): Advances in Multimedia Modeling - 17th International Multimedia Modeling Conference, MMM 2011, Taipei, Taiwan, January 5-7, 2011, Proceedings, Part I. Lecture Notes in Computer Science 6523, Springer 2011, ISBN 978-3-642-17831-3
- [e1]Kuo-Tien Lee, Wen-Hsiang Tsai, Hong-Yuan Mark Liao, Tsuhan Chen, Jun-Wei Hsieh, Chien-Cheng Tseng (Eds.): Advances in Multimedia Modeling - 17th International Multimedia Modeling Conference, MMM 2011, Taipei, Taiwan, January 5-7, 2011, Proceedings, Part II. Lecture Notes in Computer Science 6524, Springer 2011, ISBN 978-3-642-17828-3
- 2010
- [j25]Chien-Cheng Tseng, Su-Ling Lee: Design of fractional delay filter using discrete Fourier transform interpolation method. Signal Processing 90(4): 1313-1322 (2010)
- [j24]Chien-Cheng Tseng, Su-Ling Lee: Design of Fractional Order Digital Differentiator Using Radial Basis Function. IEEE Trans. on Circuits and Systems 57-I(7): 1708-1718 (2010)
- [j23]Chien-Cheng Tseng, Su-Ling Lee: Design of Wideband Fractional Delay Filters Using Derivative Sampling Method. IEEE Trans. on Circuits and Systems 57-I(8): 2087-2098 (2010)
2000 – 2009
- 2009
- [c24]Chien-Cheng Tseng, Su-Ling Lee: Design of Fractional Delay FIR Filter using Radial Basis Function. ISCAS 2009: 485-488
- [c23]Chien-Cheng Tseng, Su-Ling Lee: Design of Digital IIR Integrator using Discrete Hartley Transform Interpolation Method. ISCAS 2009: 2181-2184
- 2008
- [j22]Chien-Cheng Tseng, Su-Ling Lee: Digital IIR integrator design using recursive Romberg integration rule and fractional sample delay. Signal Processing 88(9): 2222-2233 (2008)
- [j21]Chien-Cheng Tseng: Series expansion design of variable fractional order integrator and differentiator using logarithm. Signal Processing 88(9): 2278-2292 (2008)
- [j20]Chien-Cheng Tseng, Su-Ling Lee: Digital IIR Integrator Design Using Richardson Extrapolation and Fractional Delay. IEEE Trans. on Circuits and Systems 55-I(8): 2300-2309 (2008)
- [c22]Hsu-Yung Cheng, Chih-Chang Yu, Chien-Cheng Tseng, Kuo-Chin Fan, Jenq-Neng Hwang, Bor-Shenn Jeng: Hierarchical lane detection for different types of roads. ICASSP 2008: 1349-1352
- [c21]Chien-Cheng Tseng, Su-Ling Lee: Design of second order digital differentiator using Richardson extrapolation and fractional delay. ISCAS 2008: 1120-1123
- [c20]Chien-Cheng Tseng, Su-Ling Lee: Design of fractional delay FIR filter using discrete Fourier transform interpolation method. ISCAS 2008: 1156-1159
- 2007
- [j19]Chien-Cheng Tseng: Designs of fractional delay filter, Nyquist filter, lowpass filter and diamond-shaped filter. Signal Processing 87(4): 584-601 (2007)
- [j18]Chien-Cheng Tseng: Design of FIR and IIR fractional order Simpson digital integrators. Signal Processing 87(5): 1045-1057 (2007)
- 2006
- [j17]Chien-Cheng Tseng, Su-Ling Lee: Linear phase FIR differentiator design based on maximum signal-to-noise ratio criterion. Signal Processing 86(2): 388-398 (2006)
- [j16]Chien-Cheng Tseng: Design of variable and adaptive fractional order FIR differentiators. Signal Processing 86(10): 2554-2566 (2006)
- [c19]Chien-Cheng Tseng: Design of half sample delay IIR filter using continued fraction expansion. ISCAS 2006
- [c18]Chien-Cheng Tseng: Design of IIR integrators using Newton-Cotes quadrature rule and fractional sample delay. ISCAS 2006
- 2005
- [c17]Chien-Cheng Tseng, Tsung-Ming Hwang: Quantum circuit design of discrete Hartley transform using recursive decomposition formula. ISCAS (1) 2005: 824-827
- [c16]Chien-Cheng Tseng, Tsung-Ming Hwang: Quantum circuit design of 8×8 discrete cosine transform using its fast computation flow graph. ISCAS (1) 2005: 828-831
- [c15]Chien-Cheng Tseng: Improved design of fractional order differentiator using fractional sample delay. ISCAS (4) 2005: 3713-3716
- [c14]Chien-Cheng Tseng: Digital differentiator design using fractional sample delay filter. ISCAS (4) 2005: 3717-3720
- 2004
- [c13]Chien-Cheng Tseng, Tsung-Ming Hwang: Quantum circuit design of 8 /spl times/ 8 discrete Hartley transform. ISCAS (3) 2004: 397-400
- [c12]Chien-Cheng Tseng: Design of variable fractional delay FIR filter using symmetry. ISCAS (3) 2004: 477-480
- 2003
- [c11]Chien-Cheng Tseng: Analytical design of fractional Hilbert transformer using fractional differencing. ISCAS (4) 2003: 173-176
- [c10]Chien-Cheng Tseng: Design of 2-D variable fractional delay FIR filter using 2-D differentiators. ISCAS (4) 2003: 189-192
- [c9]Chien-Cheng Tseng: Design of IIR digital allpass filters using least pth phase error criterion. ISCAS (4) 2003: 209-212
- [c8]Chien-Cheng Tseng: Design of sinusoid-based variable fractional delay FIR filter using weighted least squares method. ISCAS (3) 2003: 546-549
- 2002
- [j15]Chien-Cheng Tseng: Eigenvalues and eigenvectors of generalized DFT, generalized DHT, DCT-IV and DST-IV matrices. IEEE Transactions on Signal Processing 50(4): 866-877 (2002)
- [c7]Chien-Cheng Tseng: Design of variable fractional delay FIR filter using differentiator bank. ISCAS (4) 2002: 421-424
- [c6]Chien-Cheng Tseng: Design of variable fractional delay allpass filter using weighted least squares method. ISCAS (5) 2002: 713-716
- 2001
- [j14]Shih-Chang Hsia, Chien-Cheng Tseng: A recursive full search algorithm based on temporal correlation. Signal Processing 81(11): 2419-2427 (2001)
- [j13]Chien-Cheng Tseng, Soo-Chang Pei: Stable IIR notch filter design with optimal pole placement. IEEE Transactions on Signal Processing 49(11): 2673-2681 (2001)
- [c5]Chien-Cheng Tseng, Su-Ling Lee: Design of digital differentiator based on maximum signal to noise ratio criterion. ISCAS (2) 2001: 77-80
- [c4]Chien-Cheng Tseng, Su-Ling Lee: Elimination of power line interference and noise in electrocardiogram using constrained eigenfilter. ISCAS (2) 2001: 405-408
- 2000
- [j12]Chien-Cheng Tseng, Soo-Chang Pei, Shih-Chang Hsia: Computation of fractional derivatives using Fourier transform and digital FIR differentiator. Signal Processing 80(1): 151-159 (2000)
- [j11]Chien-Cheng Tseng: Stable IIR digital differentiator design using iterative quadratic programming approach. Signal Processing 80(5): 857-866 (2000)
1990 – 1999
- 1999
- [j10]Chien-Cheng Tseng, Bor-Shenn Jeng, Kuo-Sen Chou: Candidate Selection in On-Line Chinese Character Recognition System Using Voting Scheme. J. Inf. Sci. Eng. 15(3): 451-462 (1999)
- [j9]Chien-Cheng Tseng, Soo-Chang Pei: Design of an equiripple FIR notch filter using a multiple exchange algorithm. Signal Processing 75(3): 225-237 (1999)
- [c3]Soo-Chang Pei, Chien-Cheng Tseng: FIR filter design based on total least squares error criterion. ISCAS (3) 1999: 283-286
- 1998
- [j8]Chien-Cheng Tseng, Chang-Jung Juan, Hsi-Cheng Chang, Jeen-Fong Lin: An optimal line segment extraction algorithm for online Chinese character recognition using dynamic programming. Pattern Recognition Letters 19(10): 953-961 (1998)
- [j7]Wu-Sheng Lu, Soo-Chang Pei, Chien-Cheng Tseng: A weighted least-squares method for the design of stable 1-D and 2-D IIR digital filters. IEEE Transactions on Signal Processing 46(1): 1-10 (1998)
- 1997
- [j6]Charng-Kann Chen, Chien-Cheng Tseng: Minimax design of digital allpass filters using multiple exchange eigendecomposition algorithms. Signal Processing 57(1): 93-102 (1997)
- [j5]Soo-Chang Pei, Chien-Cheng Tseng: Design of equiripple log FIR and IIR filters using multiple exchange algorithm. Signal Processing 59(3): 291-303 (1997)
- 1996
- [j4]Shyh-Rong Lay, Chao-Hao Lee, Nai-Jen Cheng, Chien-Cheng Tseng, Bor-Shenn Jeng, Pei-Yih Ting, Quen-Zong Wu, Miin-Luen Day: On-line chinese character recognition with effective candidate radical and candidate character selections. Pattern Recognition 29(10): 1647-1659 (1996)
- [j3]Soo-Chang Pei, Chien-Cheng Tseng, Ching-Yung Lin: A parallel decoding algorithm for IFS codes without transient behavior. IEEE Transactions on Image Processing 5(3): 411-415 (1996)
- [j2]Soo-Chang Pei, Chien-Cheng Tseng: Transform domain adaptive linear phase filter. IEEE Transactions on Signal Processing 44(12): 3142-3146 (1996)
- 1995
- [j1]Soo-Chang Pei, Chien-Cheng Tseng, Ching-Yung Lin: Wavelet transform and scale space filtering of fractal images. IEEE Transactions on Image Processing 4(5): 682-687 (1995)
- 1993
- [c2]Soo-Chang Pei, Ching-Yung Lin, Chien-Cheng Tseng: Two-dimensional LMS adaptive linear phase filters. ISCAS 1993: 311-314
- [c1]Soo-Chang Pei, Chien-Cheng Tseng: Two dimensional IIR and FIR digital notch filter design. ISCAS 1993: 890-893
Coauthor Index
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2013-10-02 10:55 CEST by the dblp team