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Gábor Szedö

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2000 – 2009

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2008
[j1]
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  - journals/vlsi/SzantoSF08
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Péter Szántó, Gábor Szedö, Béla Fehér:
High-Performance Timing-Driven Rank Filter. VLSI Design 2008: 753043:1-753043:6 (2008)
2006
[c3]
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  - conf/icecsys/SzantoFS06
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Péter Szántó, Béla Fehér, Gábor Szedö:
High Performance Timing-Driven Rank Filter. ICECS 2006: 752-755
2000
[c2]
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  - conf/fpga/SzedoNSB00
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Gábor Szedö, Sandeep Neema, Jason Scott, Ted Bapty:
Reconfigurable target recognition system (poster abstract). FPGA 2000: 221

1990 – 1999

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1998
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Béla Fehér, Gábor Szedö:
Cost Effective 2×2 Inner Product Processors. FPL 1998: 348-355

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