Gábor Szedö
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2000 – 2009
- 2008
- [j1]Péter Szántó, Gábor Szedö, Béla Fehér:
High-Performance Timing-Driven Rank Filter. VLSI Design 2008: 753043:1-753043:6 (2008) - 2006
- [c3]Péter Szántó, Béla Fehér, Gábor Szedö:
High Performance Timing-Driven Rank Filter. ICECS 2006: 752-755 - 2000
- [c2]Gábor Szedö, Sandeep Neema, Jason Scott, Ted Bapty:
Reconfigurable target recognition system (poster abstract). FPGA 2000: 221
1990 – 1999
- 1998
- [c1]
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last updated on 2018-04-26 16:09 CEST by the dblp team