| 2013 | ||
|---|---|---|
| j71 | Matthew Fojtik, David Fick, Yejoong Kim, Nathaniel Ross Pinckney, David Money Harris, David Blaauw, Dennis Sylvester: Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction. J. Solid-State Circuits 48(1): 66-81 (2013) | |
| j70 | David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, David Blaauw, Dennis Sylvester: Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS. J. Solid-State Circuits 48(1): 104-117 (2013) | |
| j69 | Yoonmyung Lee, Suyoung Bang, Inhee Lee, Yejoong Kim, Gyouho Kim, Mohammad Hassan Ghaed, Pat Pannuto, Prabal Dutta, Dennis Sylvester, David Blaauw: A Modular 1 mm3 Die-Stacked Sensing Platform With Low Power I2C Inter-Die Communication and Multi-Modal Energy Harvesting. J. Solid-State Circuits 48(1): 229-243 (2013) | |
| j68 | Matthew Fojtik, Daeyeon Kim, Gregory K. Chen, Yu-Shiang Lin, David Fick, Junsun Park, Mingoo Seok, Mao-Ter Chen, Zhiyoong Foo, David Blaauw, Dennis Sylvester: A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells. J. Solid-State Circuits 48(3): 801-813 (2013) | |
| j67 | Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Dennis Sylvester, David Blaauw, Trevor N. Mudge: Centip3De: A 64-Core, 3D Stacked Near-Threshold System. IEEE Micro 33(2): 8-16 (2013) | |
| j66 | Puneet Gupta, Yuvraj Agarwal, Lara Dolecek, Nikil Dutt, Rajesh K. Gupta, Rakesh Kumar, Subhasish Mitra, Alexandru Nicolau, Tajana Simunic Rosing, Mani B. Srivastava, Steven Swanson, Dennis Sylvester: Underdesigned and Opportunistic Computing in Presence of Hardware Variability. IEEE Trans. on CAD of Integrated Circuits and Systems 32(1): 8-23 (2013) | |
| j65 | Cheng Zhuo, Dennis Sylvester, David Blaauw: A Statistical Framework for Post-Fabrication Oxide Breakdown Reliability Prediction and Management. IEEE Trans. on CAD of Integrated Circuits and Systems 32(4): 630-643 (2013) | |
| c175 | Dongsuk Jeon, Yejoong Kim, Inhee Lee, Zhengya Zhang, David Blaauw, Dennis Sylvester: A 470mV 2.7mW feature extraction-accelerator for micro-autonomous vehicle navigation in 28nm CMOS. ISSCC 2013: 166-167 | |
| c174 | Dong-Woo Jee, Dennis Sylvester, David Blaauw, Jae-Yoon Sim: A 0.45V 423nW 3.2MHz multiplying DLL with leakage-based oscillator for ultra-low-power sensor platforms. ISSCC 2013: 188-189 | |
| c173 | Seon-Kyoo Lee, Seung-Hun Lee, Dennis Sylvester, David Blaauw, Jae-Yoon Sim: A 95fJ/b current-mode transceiver for 10mm on-chip interconnect. ISSCC 2013: 262-263 | |
| c172 | Seongjong Kim, Inyong Kwon, David Fick, Myungbo Kim, Yen-Po Chen, Dennis Sylvester: Razor-lite: A side-channel error-detection register for timing-margin recovery in 45nm SOI CMOS. ISSCC 2013: 264-265 | |
| c171 | Suyoung Bang, Allan Wang, Bharan Giridhar, David Blaauw, Dennis Sylvester: A fully integrated successive-approximation switched-capacitor DC-DC converter with 31mV output voltage resolution. ISSCC 2013: 370-371 | |
| c170 | Gyouho Kim, Mahmood Barangi, Zhiyoong Foo, Nathaniel Ross Pinckney, Suyoung Bang, David Blaauw, Dennis Sylvester: A 467nW CMOS visual motion sensor with temporal averaging and pixel aggregation. ISSCC 2013: 480-481 | |
| 2012 | ||
| j64 | Korey Sewell, Ronald G. Dreslinski, Thomas Manville, Sudhir Satpathy, Nathaniel Ross Pinckney, Geoffrey Blake, Michael Cieslak, Reetuparna Das, Thomas F. Wenisch, Dennis Sylvester, David Blaauw, Trevor N. Mudge: Swizzle-Switch Networks for Many-Core Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 2(2): 278-294 (2012) | |
| j63 | Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester: A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS. J. Solid-State Circuits 47(1): 23-34 (2012) | |
| j62 | Mingoo Seok, Gyouho Kim, David Blaauw, Dennis Sylvester: A Portable 2-Transistor Picowatt Temperature-Compensated Voltage Reference Operating at 0.5 V. J. Solid-State Circuits 47(10): 2534-2545 (2012) | |
| j61 | Andrew DeOrio, David Fick, Valeria Bertacco, Dennis Sylvester, David Blaauw, Jin Hu, Gregory K. Chen: A Reliable Routing Architecture and Algorithm for NoCs. IEEE Trans. on CAD of Integrated Circuits and Systems 31(5): 726-739 (2012) | |
| j60 | Dongsuk Jeon, Mingoo Seok, Zhengya Zhang, David Blaauw, Dennis Sylvester: Design Methodology for Voltage-Overscaled Ultra-Low-Power Systems. IEEE Trans. on Circuits and Systems 59-II(12): 952-956 (2012) | |
| j59 | Mingoo Seok, Scott Hanson, David Blaauw, Dennis Sylvester: Sleep Mode Analysis and Optimization With Minimal-Sized Power Gating Switch for Ultra-Low ${V}_{\rm dd}$ Operation. IEEE Trans. VLSI Syst. 20(4): 605-615 (2012) | |
| j58 | Prashant Singh, Eric Karl, David Blaauw, Dennis Sylvester: Compact Degradation Sensors for Monitoring NBTI and Oxide Degradation. IEEE Trans. VLSI Syst. 20(9): 1645-1655 (2012) | |
| c169 | Ronald G. Dreslinski, Thomas Manville, Korey Sewell, Reetuparna Das, Nathaniel Ross Pinckney, Sudhir Satpathy, David Blaauw, Dennis Sylvester, Trevor N. Mudge: XPoint cache: scaling existing bus-based coherence protocols for 2D and 3D many-core systems. PACT 2012: 75-86 | |
| c168 | Vivek Joshi, Kanak Agarwal, Dennis Sylvester: Design-patterning co-optimization of SRAM robustness for double patterning lithography. ASP-DAC 2012: 713-718 | |
| c167 | Suyoung Bang, David Blaauw, Dennis Sylvester, Massimo Alioto: Reconfigurable sleep transistor for GIDL reduction in ultra-low standby power systems. CICC 2012: 1-4 | |
| c166 | Gyouho Kim, Yoonmyung Lee, Suyoung Bang, Inhee Lee, Yejoong Kim, Dennis Sylvester, David Blaauw: A 695 pW standby power optical wake-up receiver for wireless sensor nodes. CICC 2012: 1-4 | |
| c165 | Sudhir Satpathy, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David Blaauw: High radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service. DAC 2012: 406-411 | |
| c164 | Yoonmyung Lee, Yejoong Kim, Dongmin Yoon, David Blaauw, Dennis Sylvester: Circuit and system design guidelines for ultra-low power sensor nodes. DAC 2012: 1037-1042 | |
| c163 | Nathaniel Ross Pinckney, Korey Sewell, Ronald G. Dreslinski, David Fick, Trevor N. Mudge, Dennis Sylvester, David Blaauw: Assessing the performance limits of parallelized near-threshold computing. DAC 2012: 1147-1152 | |
| c162 | Yejoong Kim, Yoonmyung Lee, Dennis Sylvester, David Blaauw: SLC: Split-control Level Converter for dense and stable wide-range voltage conversion. ESSCIRC 2012: 478-481 | |
| c161 | Pat Pannuto, Yoonmyung Lee, Benjamin P. Kempke, Dennis Sylvester, David Blaauw, Prabal Dutta: Ultra-constrained sensor platform interfacing. IPSN 2012: 147-148 | |
| c160 | Daeyeon Kim, Vikas Chandra, Robert C. Aitken, David Blaauw, Dennis Sylvester: An adaptive write word-line pulse width and voltage modulation architecture for bit-interleaved 8T SRAMs. ISLPED 2012: 91-96 | |
| c159 | David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Trevor N. Mudge, Dennis Sylvester, David Blaauw: Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores. ISSCC 2012: 190-192 | |
| c158 | Dongmin Yoon, Dennis Sylvester, David Blaauw: A 5.58nW 32.768kHz DLL-assisted XO for real-time clocks in wireless sensing applications. ISSCC 2012: 366-368 | |
| c157 | Yoonmyung Lee, Gyouho Kim, Suyoung Bang, Yejoong Kim, Inhee Lee, Prabal Dutta, Dennis Sylvester, David Blaauw: A modular 1mm3 die-stacked sensing platform with optical communication and multi-modal energy harvesting. ISSCC 2012: 402-404 | |
| c156 | Sudhir Satpathy, Korey Sewell, Thomas Manville, Yen-Po Chen, Ronald G. Dreslinski, Dennis Sylvester, Trevor N. Mudge, David Blaauw: A 4.5Tb/s 3.4Tb/s/W 64×64 switch fabric with self-updating least-recently-granted priority and quality-of-service arbitration in 45nm CMOS. ISSCC 2012: 478-480 | |
| c155 | Matthew Fojtik, David Fick, Yejoong Kim, Nathaniel Ross Pinckney, David Money Harris, David Blaauw, Dennis Sylvester: Bubble Razor: An architecture-independent approach to timing-error detection and correction. ISSCC 2012: 488-490 | |
| c154 | Hassan Ghaed, Gregory K. Chen, David Blaauw, Dennis Sylvester: Analysis and measurement of the stability of dual-resonator oscillators. RWS 2012: 219-222 | |
| 2011 | ||
| j57 | Mingoo Seok, Gregory K. Chen, Scott Hanson, Michael Wieckowski, David T. Blaauw, Dennis Sylvester: CAS-FEST 2010: Mitigating Variability in Near-Threshold Computing. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(1): 42-49 (2011) | |
| j56 | Mingoo Seok, David T. Blaauw, Dennis Sylvester: Robust Clock Network Design Methodology for Ultra-Low Voltage Operations. IEEE J. Emerg. Sel. Topics Circuits Syst. 1(2): 120-130 (2011) | |
| j55 | Jae-sun Seo, David Blaauw, Dennis Sylvester: Crosstalk-Aware PWM-Based On-Chip Links With Self-Calibration in 65 nm CMOS. J. Solid-State Circuits 46(9): 2041-2052 (2011) | |
| j54 | Vineeth Veetil, Kaviraj Chopra, David Blaauw, Dennis Sylvester: Fast Statistical Static Timing Analysis Using Smart Monte Carlo Techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 30(6): 852-865 (2011) | |
| j53 | Cheng Zhuo, Kaviraj Chopra, Dennis Sylvester, David Blaauw: Process Variation and Temperature-Aware Full Chip Oxide Breakdown Reliability Analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 30(9): 1321-1334 (2011) | |
| j52 | Prashant Singh, Eric Karl, Dennis Sylvester, David Blaauw: Dynamic NBTI Management Using a 45 nm Multi-Degradation Sensor. IEEE Trans. on Circuits and Systems 58-I(9): 2026-2037 (2011) | |
| j51 | Jae-sun Seo, Himanshu Kaul, Ram Krishnamurthy, Dennis Sylvester, David Blaauw: A Robust Edge Encoding Technique for Energy-Efficient Multi-Cycle Interconnect. IEEE Trans. VLSI Syst. 19(2): 264-273 (2011) | |
| c153 | Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester: Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design. DAC 2011: 990-995 | |
| c152 | Mark Woh, Sudhir Satpathy, Ronald G. Dreslinski, Danny Kershaw, Dennis Sylvester, David Blaauw, Trevor N. Mudge: Low power interconnects for SIMD computers. DATE 2011: 600-605 | |
| c151 | Chia-Hsiang Chen, Yejoong Kim, Zhengya Zhang, David Blaauw, Dennis Sylvester, H. Naeimi, S. Sandhu: A confidence-driven model for error-resilient computing. DATE 2011: 1608-1613 | |
| c150 | Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester: Energy-optimized high performance FFT processor. ICASSP 2011: 1701-1704 | |
| c149 | Gregory K. Chen, Michael Wieckowski, Daeyeon Kim, David Blaauw, Dennis Sylvester: A dense 45nm half-differential SRAM with lower minimum operating voltage. ISCAS 2011: 57-60 | |
| c148 | Daeyeon Kim, Gregory K. Chen, Matthew Fojtik, Mingoo Seok, David Blaauw, Dennis Sylvester: A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation scheme. ISCAS 2011: 69-72 | |
| c147 | Daeyeon Kim, Vikas Chandra, Robert C. Aitken, David Blaauw, Dennis Sylvester: Variation-aware static and dynamic writability analysis for voltage-scaled bit-interleaved 8-T SRAMs. ISLPED 2011: 145-150 | |
| c146 | Michael Wieckowski, Gregory K. Chen, Daeyeon Kim, David Blaauw, Dennis Sylvester: A 128kb high density portless SRAM using hierarchical bitlines and thyristor sense amplifiers. ISQED 2011: 87-90 | |
| c145 | Yoonmyung Lee, Bharan Giridhar, Zhiyoong Foo, Dennis Sylvester, David Blaauw: A 660pW multi-stage temperature-compensated timer for ultra-low-power wireless sensor node synchronization. ISSCC 2011: 46-48 | |
| c144 | Gregory K. Chen, Hassan Ghaed, Razi-Ul Haque, Michael Wieckowski, Yejoong Kim, Gyouho Kim, David Fick, Daeyeon Kim, Mingoo Seok, Kensall Wise, David Blaauw, Dennis Sylvester: A cubic-millimeter energy-autonomous wireless intraocular pressure monitor. ISSCC 2011: 310-312 | |
| c143 | Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester: A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining. ISSCC 2011: 342-344 | |
| 2010 | ||
| j50 | Scott Hanson, Zhiyoong Foo, David Blaauw, Dennis Sylvester: A 0.5 V Sub-Microwatt CMOS Image Sensor With Pulse-Width Modulation Read-Out. J. Solid-State Circuits 45(4): 759-767 (2010) | |
| j49 | Ronald G. Dreslinski, Michael Wieckowski, David Blaauw, Dennis Sylvester, Trevor N. Mudge: Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits. Proceedings of the IEEE 98(2): 253-266 (2010) | |
| j48 | Gregory K. Chen, Scott Hanson, David Blaauw, Dennis Sylvester: Circuit Design Advances for Wireless Sensing Applications. Proceedings of the IEEE 98(11): 1808-1827 (2010) | |
| j47 | Ravikishore Gandikota, Kaviraj Chopra, David Blaauw, Dennis Sylvester: Victim Alignment in Crosstalk-Aware Timing Analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 29(2): 261-274 (2010) | |
| j46 | Vivek Joshi, Brian Cline, Dennis Sylvester, David Blaauw, Kanak Agarwal: Mechanical Stress Aware Optimization for Leakage Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 29(5): 722-736 (2010) | |
| j45 | Harmander Singh, Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown: Dynamically Pulsed MTCMOS With Bus Encoding for Reduction of Total Power and Crosstalk Noise. IEEE Trans. VLSI Syst. 18(1): 166-170 (2010) | |
| j44 | Gregory K. Chen, Dennis Sylvester, David Blaauw, Trevor N. Mudge: Yield-Driven Near-Threshold SRAM Design. IEEE Trans. VLSI Syst. 18(11): 1590-1598 (2010) | |
| c142 | Cheng Zhuo, Yung-Hsu Chang, Dennis Sylvester, David Blaauw: Design time body bias selection for parametric yield improvement. ASP-DAC 2010: 681-688 | |
| c141 | Vivek Joshi, Kanak Agarwal, Dennis Sylvester, David Blaauw: Analyzing electrical effects of RTA-driven local anneal temperature variation. ASP-DAC 2010: 739-744 | |
| c140 | Vivek Joshi, Michael Wieckowski, Gregory K. Chen, David Blaauw, Dennis Sylvester: Analyzing the impact of Double Patterning Lithography on SRAM variability in 45nm CMOS. CICC 2010: 1-4 | |
| c139 | Yoonmyung Lee, Gregory K. Chen, Scott Hanson, Dennis Sylvester, David Blaauw: Ultra-low power circuit techniques for a new class of sub-mm3 sensor nodes. CICC 2010: 1-8 | |
| c138 | Prashant Singh, Eric Karl, Dennis Sylvester, David Blaauw: Dynamic NBTI management using a 45nm multi-degradation sensor. CICC 2010: 1-4 | |
| c137 | Vivek Joshi, Valeriy Sukharev, Andres Torres, Kanak Agarwal, Dennis Sylvester, David Blaauw: Closed-form modeling of layout-dependent mechanical stress. DAC 2010: 673-678 | |
| c136 | Vineeth Veetil, Yung-Hsu Chang, Dennis Sylvester, David Blaauw: Efficient smart monte carlo based SSTA on graphics processing units with improved resource utilization. DAC 2010: 793-798 | |
| c135 | Cheng Zhuo, Dennis Sylvester, David Blaauw: Process variation and temperature-aware reliability management. DATE 2010: 580-585 | |
| c134 | Michael Wieckowski, Dennis Sylvester, David Blaauw, Vikas Chandra, Sachin Idgunji, Cezary Pietrzyk, Robert C. Aitken: A black box method for stability analysis of arbitrary SRAM cell structures. DATE 2010: 795-800 | |
| c133 | Vivek Joshi, Kanak Agarwal, David Blaauw, Dennis Sylvester: Analysis and optimization of SRAM robustness for double patterning lithography. ICCAD 2010: 25-31 | |
| c132 | Cheng Zhuo, Kanak Agarwal, David Blaauw, Dennis Sylvester: Active learning framework for post-silicon variation extraction and test cost reduction. ICCAD 2010: 508-515 | |
| c131 | Vineeth Veetil, Dennis Sylvester, David Blaauw: A lower bound computation method for evaluation of statistical design techniques. ICCAD 2010: 562-569 | |
| c130 | Mingoo Seok, Scott Hanson, Michael Wieckowski, Gregory K. Chen, Yu-Shiang Lin, David Blaauw, Dennis Sylvester: Circuit design advances to enable ubiquitous sensing environments. ISCAS 2010: 285-288 | |
| c129 | Mingoo Seok, David Blaauw, Dennis Sylvester: Clock network design for ultra-low power applications. ISLPED 2010: 271-276 | |
| c128 | Vivek Joshi, Kanak Agarwal, Dennis Sylvester: Simultaneous extraction of effective gate length and low-field mobility in non-uniform devices. ISQED 2010: 158-162 | |
| c127 | Jae-sun Seo, Ron Ho, Jon K. Lexau, Michael Dayringer, Dennis Sylvester, David Blaauw: High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS. ISSCC 2010: 182-183 | |
| c126 | David Fick, Nurrachman Liu, Zhiyoong Foo, Matthew Fojtik, Jae-sun Seo, Dennis Sylvester, David Blaauw: In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter. ISSCC 2010: 188-189 | |
| c125 | Prashant Singh, Zhiyoong Foo, Michael Wieckowski, Scott Hanson, Matthew Fojtik, David Blaauw, Dennis Sylvester: Early detection of oxide breakdown through in situ degradation sensing. ISSCC 2010: 190-191 | |
| c124 | Gregory K. Chen, Matthew Fojtik, Daeyeon Kim, David Fick, Junsun Park, Mingoo Seok, Mao-Ter Chen, Zhiyoong Foo, Dennis Sylvester, David Blaauw: Millimeter-scale nearly perpetual sensor system with stacked battery and solar cells. ISSCC 2010: 288-289 | |
| 2009 | ||
| j43 | Prashant Singh, Cheng Zhuo, Eric Karl, David Blaauw, Dennis Sylvester: Sensor-Driven Reliability and Wearout Management. IEEE Design & Test of Computers 26(6): 40-49 (2009) | |
| j42 | Rajeev R. Rao, Vivek Joshi, David Blaauw, Dennis Sylvester: Circuit optimization techniques to mitigate the effects of soft errors in combinational logic. ACM Trans. Design Autom. Electr. Syst. 15(1) (2009) | |
| j41 | Bo Zhai, Sanjay Pant, Leyla Nazhandali, Scott Hanson, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Todd M. Austin, Dennis Sylvester, David Blaauw: Energy-Efficient Subthreshold Processor Design. IEEE Trans. VLSI Syst. 17(8): 1127-1137 (2009) | |
| j40 | Youngmin Kim, Dusan Petranovic, Dennis Sylvester: Simple and Accurate Models for Capacitance Considering Floating Metal Fill Insertion. IEEE Trans. VLSI Syst. 17(8): 1166-1170 (2009) | |
| c123 | Yu-Shiang Lin, Dennis Sylvester, David Blaauw: Near-field communication using phase-locking and pulse signaling for millimeter-scale systems. CICC 2009: 563-566 | |
| c122 | Mingoo Seok, Gyouho Kim, Dennis Sylvester, David Blaauw: A 0.5V 2.2pW 2-transistor voltage reference. CICC 2009: 577-580 | |
| c121 | Vineeth Veetil, Dennis Sylvester, David Blaauw, Saumil Shah, Steffen Rochel: Efficient smart sampling based full-chip leakage analysis for intra-die variation considering state dependence. DAC 2009: 154-159 | |
| c120 | David Fick, Andrew DeOrio, Jin Hu, Valeria Bertacco, David Blaauw, Dennis Sylvester: Vicis: a reliable network for unreliable silicon. DAC 2009: 812-817 | |
| c119 | David Fick, Andrew DeOrio, Gregory K. Chen, Valeria Bertacco, Dennis Sylvester, David Blaauw: A highly resilient routing algorithm for fault-tolerant NoCs. DATE 2009: 21-26 | |
| c118 | Cheng Zhuo, David Blaauw, Dennis Sylvester: Post-fabrication measurement-driven oxide breakdown reliability prediction and management. ICCAD 2009: 441-448 | |
| c117 | Ravikishore Gandikota, David Blaauw, Dennis Sylvester: Interconnect performance corners considering crosstalk noise. ICCD 2009: 231-237 | |
| c116 | Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, Leland Chang, Steven J. Koester, Dennis Sylvester, David Blaauw: Low power circuit design based on heterojunction tunneling transistors (HETTs). ISLPED 2009: 219-224 | |
| c115 | Yu-Shiang Lin, Dennis Sylvester, David T. Blaauw: A 150pW program-and-hold timer for ultra-low-power sensor platforms. ISSCC 2009: 326-327 | |
| c114 | Ronald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor N. Mudge: Reconfigurable Multicore Server Processors for Low Power Operation. SAMOS 2009: 247-254 | |
| 2008 | ||
| j39 | Dennis Sylvester, Kanak Agarwal, Saumil Shah: Variability in nanometer CMOS: Impact, analysis, and minimization. Integration 41(3): 319-339 (2008) | |
| j38 | Ashish Srivastava, Kaviraj Chopra, Saumil Shah, Dennis Sylvester, David Blaauw: A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 272-285 (2008) | |
| j37 | Sarvesh H. Kulkarni, Dennis Sylvester, David T. Blaauw: Design-Time Optimization of Post-Silicon Tuned Circuits Using Adaptive Body Bias. IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 481-494 (2008) | |
| j36 | Eric Karl, David Blaauw, Dennis Sylvester, Trevor N. Mudge: Multi-Mechanism Reliability Modeling and Management in Dynamic Systems. IEEE Trans. VLSI Syst. 16(4): 476-487 (2008) | |
| j35 | Prashant Singh, Jae-sun Seo, David Blaauw, Dennis Sylvester: Self-Timed Regenerators for High-Speed and Low-Power On-Chip Global Interconnect. IEEE Trans. VLSI Syst. 16(6): 673-677 (2008) | |
| c113 | Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester: Investigation of diffusion rounding for post-lithography analysis. ASP-DAC 2008: 480-485 | |
| c112 | Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown: Clock tree synthesis with data-path sensitivity matching. ASP-DAC 2008: 498-503 | |
| c111 | Vineeth Veetil, Dennis Sylvester, David Blaauw: Efficient Monte Carlo based incremental statistical timing analysis. DAC 2008: 676-681 | |
| c110 | Vivek Joshi, Brian Cline, Dennis Sylvester, David Blaauw, Kanak Agarwal: Leakage power reduction using stress-enhanced layouts. DAC 2008: 912-917 | |
| c109 | Ravikishore Gandikota, David Blaauw, Dennis Sylvester: Modeling crosstalk in statistical static timing analysis. DAC 2008: 974-979 | |
| c108 | Jae-sun Seo, Igor L. Markov, Dennis Sylvester, David Blaauw: On the decreasing significance of large standard cells in technology mapping. ICCAD 2008: 116-121 | |
| c107 | Brian Cline, Vivek Joshi, Dennis Sylvester, David Blaauw: STEEL: a technique for stress-enhanced standard cell library design. ICCAD 2008: 691-697 | |
| c106 | Kaviraj Chopra, Cheng Zhuo, David Blaauw, Dennis Sylvester: A statistical approach for full-chip gate-oxide reliability analysis. ICCAD 2008: 698-705 | |
| c105 | Himanshu Kaul, Jae-sun Seo, Mark Anders, Dennis Sylvester, Ram Krishnamurthy: A robust alternate repeater technique for high performance busses in the multi-core era. ISCAS 2008: 372-375 | |
| c104 | Yu-Shiang Lin, Scott Hanson, Fabio Albano, Carlos Tokunaga, Razi-Ul Haque, Kensall Wise, Ann Marie Sastry, David Blaauw, Dennis Sylvester: Low-voltage circuit design for widespread sensing applications. ISCAS 2008: 2558-2561 | |
| c103 | Mingoo Seok, Dennis Sylvester, David Blaauw: Optimal technology selection for minimizing energy and variability in low voltage applications. ISLPED 2008: 9-14 | |
| c102 | Cheng Zhuo, David Blaauw, Dennis Sylvester: Variation-aware gate sizing and clustering for post-silicon optimized circuits. ISLPED 2008: 105-110 | |
| c101 | Yu-Shiang Lin, Dennis Sylvester: Single stage static level shifter design for subthreshold to I/O voltage conversion. ISLPED 2008: 197-200 | |
| c100 | Vivek Joshi, Brian Cline, Dennis Sylvester, David Blaauw, Kanak Agarwal: Stress aware layout optimization. ISPD 2008: 168-174 | |
| c99 | Vineeth Veetil, Dennis Sylvester, David Blaauw: Fast and Accurate Waveform Analysis with Current Source Models. ISQED 2008: 53-56 | |
| c98 | Eric Karl, Dennis Sylvester, David Blaauw: Analysis of System-Level Reliability Factors and Implications on Real-Time Monitoring Methods for Oxide Breakdown Device Failures. ISQED 2008: 391-395 | |
| c97 | Ronald G. Dreslinski, Gregory K. Chen, Trevor N. Mudge, David Blaauw, Dennis Sylvester, Krisztián Flautner: Reconfigurable energy efficient near threshold cache architectures. MICRO 2008: 459-470 | |
| 2007 | ||
| j34 | Ashish Srivastava, T. Kachru, Dennis Sylvester: Low-Power-Design Space Exploration Considering Process Variation Using Robust Optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 67-79 (2007) | |
| j33 | Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester: Computing the Soft Error Rate of a Combinational Logic Circuit Using Parameterized Descriptors. IEEE Trans. on CAD of Integrated Circuits and Systems 26(3): 468-479 (2007) | |
| j32 | Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester: Self-Compensating Design for Reduction of Timing and Leakage Sensitivity to Systematic Pattern-Dependent Variation. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1614-1624 (2007) | |
| j31 | Kanak Agarwal, Rahul M. Rao, Dennis Sylvester, Richard B. Brown: Parametric Yield Analysis and Optimization in Leakage Dominated Technologies. IEEE Trans. VLSI Syst. 15(6): 613-623 (2007) | |
| j30 | Harmander Singh, Kanak Agarwal, Dennis Sylvester, Kevin J. Nowka: Enhanced Leakage Reduction Techniques Using Intermediate Strength Power Gating. IEEE Trans. VLSI Syst. 15(11): 1215-1224 (2007) | |
| c96 | Ronald G. Dreslinski, Bo Zhai, Trevor N. Mudge, David Blaauw, Dennis Sylvester: An Energy Efficient Parallel Architecture Using Near Threshold Operation. PACT 2007: 175-188 | |
| c95 | Youngmin Kim, Dusan Petranovic, Dennis Sylvester: Simple and Accurate Models for Capacitance Increment due to Metal Fill Insertion. ASP-DAC 2007: 456-461 | |
| c94 | Yu-Shiang Lin, Dennis Sylvester: Runtime leakage power estimation technique for combinational circuits. ASP-DAC 2007: 660-665 | |
| c93 | Ravikishore Gandikota, Kaviraj Chopra, David Blaauw, Dennis Sylvester, Murat R. Becer: Top-k Aggressors Sets in Delay Noise Analysis. DAC 2007: 174-179 | |
| c92 | Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester: Line-End Shortening is Not Always a Failure. DAC 2007: 270-271 | |
| c91 | Mingoo Seok, Scott Hanson, Dennis Sylvester, David Blaauw: Analysis and Optimization of Sleep Modes in Subthreshold Circuit Design. DAC 2007: 694-699 | |
| c90 | Scott Hanson, Mingoo Seok, Dennis Sylvester, David Blaauw: Nanometer Device Scaling in Subthreshold Circuits. DAC 2007: 700-705 | |
| c89 | Gregory K. Chen, David Blaauw, Trevor N. Mudge, Dennis Sylvester, Nam Sung Kim: Yield-driven near-threshold SRAM design. ICCAD 2007: 660-666 | |
| c88 | Vivek Joshi, David Blaauw, Dennis Sylvester: Soft-edge flip-flops for improved timing yield: design and optimization. ICCAD 2007: 667-673 | |
| c87 | Ravikishore Gandikota, Kaviraj Chopra, David Blaauw, Dennis Sylvester, Murat R. Becer, Joao Geada: Victim alignment in crosstalk aware timing analysis. ICCAD 2007: 698-704 | |
| c86 | Bo Zhai, Ronald G. Dreslinski, David Blaauw, Trevor N. Mudge, Dennis Sylvester: Energy efficient near-threshold chip multi-processing. ISLPED 2007: 32-37 | |
| c85 | Jae-sun Seo, Dennis Sylvester, David Blaauw, Himanshu Kaul, Ram Krishnamurthy: A robust edge encoding technique for energy-efficient multi-cycle interconnect. ISLPED 2007: 68-73 | |
| c84 | Jae-sun Seo, Prashant Singh, Dennis Sylvester, David Blaauw: Self-Time Regenerators for High-Speed and Low-Power Interconnect. ISQED 2007: 621-626 | |
| i2 | Himanshu Kaul, Dennis Sylvester, David Blaauw, Trevor N. Mudge, Todd M. Austin: DVS for On-Chip Bus Designs Based on Timing Error Correction. CoRR abs/0710.4679 (2007) | |
| i1 | Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylvester, Trevor N. Mudge: Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage. CoRR abs/0710.4794 (2007) | |
| 2006 | ||
| j29 | Dennis Sylvester, David Blaauw, Eric Karl: ElastIC: An Adaptive Self-Healing Architecture for Unpredictable Silicon. IEEE Design & Test of Computers 23(6): 484-490 (2006) | |
| j28 | Scott Hanson, Bo Zhai, Kerry Bernstein, David Blaauw, Andres Bryant, Leland Chang, Koushik K. Das, Wilfried Haensch, Edward J. Nowak, Dennis Sylvester: Ultralow-voltage, minimum-energy CMOS. IBM Journal of Research and Development 50(4-5): 469-490 (2006) | |
| j27 | Sarvesh H. Kulkarni, Dennis Sylvester: Power Distribution Techniques for Dual VDD Circuits. J. Low Power Electronics 2(2): 217-229 (2006) | |
| j26 | Kanak Agarwal, Dennis Sylvester, David Blaauw: Modeling and analysis of crosstalk noise in coupled RLC interconnects. IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 892-901 (2006) | |
| j25 | Kanak Agarwal, Mridul Agarwal, Dennis Sylvester, David Blaauw: Statistical interconnect metrics for physical-design optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1273-1288 (2006) | |
| j24 | Puneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester: Gate-length biasing for runtime-leakage control. IEEE Trans. on CAD of Integrated Circuits and Systems 25(8): 1475-1485 (2006) | |
| j23 | Rajeev R. Rao, Anirudh Devgan, David Blaauw, Dennis Sylvester: Analytical yield prediction considering leakage/performance correlation. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1685-1695 (2006) | |
| j22 | Dongwoo Lee, David Blaauw, Dennis Sylvester: Runtime Leakage Minimization Through Probability-Aware Optimization. IEEE Trans. VLSI Syst. 14(10): 1075-1088 (2006) | |
| c83 | Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown: Process-induced skew reduction in nominal zero-skew clock trees. ASP-DAC 2006: 84-89 | |
| c82 | Sarvesh H. Kulkarni, Dennis Sylvester: Power distribution techniques for dual VDD circuits. ASP-DAC 2006: 838-843 | |
| c81 | Sani R. Nassif, Vijay Pitchumani, N. Rodriguez, Dennis Sylvester, Clive Bittlestone, Riko Radojcic: Variation-aware analysis: savior of the nanometer era? DAC 2006: 411-412 | |
| c80 | Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown: Clock buffer and wire sizing using sequential programming. DAC 2006: 1041-1046 | |
| c79 | Eric Karl, David Blaauw, Dennis Sylvester, Trevor N. Mudge: Reliability modeling and management in dynamic microprocessor-based systems. DAC 2006: 1057-1060 | |
| c78 | Rajeev R. Rao, Kaviraj Chopra, David Blaauw, Dennis Sylvester: An efficient static algorithm for computing the soft error rates of combinational circuits. DATE 2006: 164-169 | |
| c77 | Sarvesh H. Kulkarni, Dennis Sylvester, David Blaauw: A statistical framework for post-silicon tuning through body bias clustering. ICCAD 2006: 39-46 | |
| c76 | Kaviraj Chopra, Bo Zhai, David Blaauw, Dennis Sylvester: A new statistical max operation for propagating skewness in statistical timing analysis. ICCAD 2006: 237-243 | |
| c75 | Rajeev R. Rao, David Blaauw, Dennis Sylvester: Soft error reduction in combinational logic using gate resizing and flipflop selection. ICCAD 2006: 502-509 | |
| c74 | Harmander Deogun, Dennis Sylvester, Kevin J. Nowka: Fine grained multi-threshold CMOS for enhanced leakage reduction. ISCAS 2006 | |
| c73 | Harmander Deogun, Robert M. Senger, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka: A dual-VDD boosted pulsed bus technique for low power and low leakage operation. ISLPED 2006: 73-78 | |
| c72 | Scott Hanson, Dennis Sylvester, David Blaauw: A new technique for jointly optimizing gate sizing and supply voltage in ultra-low energy circuits. ISLPED 2006: 338-341 | |
| c71 | Scott Hanson, Bo Zhai, David Blaauw, Dennis Sylvester, Andres Bryant, Xinlin Wang: Energy optimality and variability in subthreshold design. ISLPED 2006: 363-365 | |
| c70 | Vivek Joshi, Rajeev R. Rao, David Blaauw, Dennis Sylvester: Logic SER Reduction through Flipflop Redesign. ISQED 2006: 611-616 | |
| c69 | Kanak Agarwal, Kevin J. Nowka, Harmander Deogun, Dennis Sylvester: Power Gating with Multiple Sleep Modes. ISQED 2006: 633-637 | |
| 2005 | ||
| j21 | Rajeev R. Rao, David Blaauw, Dennis Sylvester, Anirudh Devgan: Modeling and Analysis of Parametric Yield under Power and Performance Constraints. IEEE Design & Test of Computers 22(4): 376-385 (2005) | |
| j20 | Dongwoo Lee, David Blaauw, Dennis Sylvester: Static leakage reduction through simultaneous V/sub t//T/sub ox/ and state assignment. IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 1014-1029 (2005) | |
| j19 | Yu Cao, Xuejue Huang, Dennis Sylvester, Tsu-Jae King, Chenming Hu: Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design. IEEE Trans. VLSI Syst. 13(1): 158-162 (2005) | |
| j18 | Yu Cao, Xiao-dong Yang, Xuejue Huang, Dennis Sylvester: Switch-factor based loop RLC modeling for efficient timing analysis. IEEE Trans. VLSI Syst. 13(9): 1072-1078 (2005) | |
| j17 | Himanshu Kaul, Dennis Sylvester, Mark Anders, Ram Krishnamurthy: Design and analysis of spatial encoding circuits for peak power reduction in on-chip buses. IEEE Trans. VLSI Syst. 13(11): 1225-1238 (2005) | |
| j16 | Bo Zhai, David T. Blaauw, Dennis Sylvester, Krisztián Flautner: The limit of dynamic voltage scaling and insomniac dynamic voltage scaling. IEEE Trans. VLSI Syst. 13(11): 1239-1252 (2005) | |
| j15 | Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar: Gate oxide leakage and delay tradeoffs for dual-T/sub ox/ circuits. IEEE Trans. VLSI Syst. 13(12): 1362-1375 (2005) | |
| j14 | Rajeev R. Rao, Harmander Deogun, David Blaauw, Dennis Sylvester: Bus encoding for total power reduction using a leakage-aware buffer configuration. IEEE Trans. VLSI Syst. 13(12): 1376-1383 (2005) | |
| c68 | Kanak Agarwal, Dennis Sylvester, David Blaauw, Anirudh Devgan: Achieving continuous VT performance in a dual VT process. ASP-DAC 2005: 393-398 | |
| c67 | Dongwoo Lee, David Blaauw, Dennis Sylvester: Runtime leakage minimization through probability-aware dual-Vt or dual-tox assignment. ASP-DAC 2005: 399-404 | |
| c66 | Mridul Agarwal, Kanak Agarwal, Dennis Sylvester, David Blaauw: Statistical modeling of cross-coupling effects in VLSI interconnects. ASP-DAC 2005: 503-506 | |
| c65 | Jie Yang, Luigi Capodieci, Dennis Sylvester: Advanced timing analysis based on post-OPC extraction of critical dimensions. DAC 2005: 359-364 | |
| c64 | Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester: Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions. DAC 2005: 365-368 | |
| c63 | Ashish Srivastava, Saumil Shah, Kanak Agarwal, Dennis Sylvester, David Blaauw, Stephen W. Director: Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance. DAC 2005: 535-540 | |
| c62 | Himanshu Kaul, Dennis Sylvester, David Blaauw, Trevor N. Mudge, Todd M. Austin: DVS for On-Chip Bus Designs Based on Timing Error Correction. DATE 2005: 80-85 | |
| c61 | Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylvester, Trevor N. Mudge: Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage. DATE 2005: 650-651 | |
| c60 | Matthew R. Guthaus, Natesan Venkateswaran, Vladimir Zolotov, Dennis Sylvester, Richard B. Brown: Optimization objectives and models of variation for statistical gate sizing. ACM Great Lakes Symposium on VLSI 2005: 313-316 | |
| c59 | Robert Bai, Nam Sung Kim, Dennis Sylvester, Trevor N. Mudge: Total leakage optimization strategies for multi-level caches. ACM Great Lakes Symposium on VLSI 2005: 381-384 | |
| c58 | Himanshu Kaul, Dennis Sylvester: A novel buffer circuit for energy efficient signaling in dual-VDD systems. ACM Great Lakes Symposium on VLSI 2005: 462-467 | |
| c57 | Saumil Shah, Ashish Srivastava, Dushyant Sharma, Dennis Sylvester, David Blaauw, Vladimir Zolotov: Discrete Vt assignment and gate sizing using a self-snapping continuous formulation. ICCAD 2005: 705-712 | |
| c56 | Kaviraj Chopra, Saumil Shah, Ashish Srivastava, David Blaauw, Dennis Sylvester: Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation. ICCAD 2005: 1023-1028 | |
| c55 | Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Himanshu Kaul, Richard B. Brown, Sani R. Nassif: Power-aware global signaling strategies. ISCAS (1) 2005: 604-607 | |
| c54 | Eric Karl, Dennis Sylvester, David Blaauw: Timing error correction techniques for voltage-scalable on-chip memories. ISCAS (4) 2005: 3563-3566 | |
| c53 | Bo Zhai, Scott Hanson, David Blaauw, Dennis Sylvester: Analysis and mitigation of variability in subthreshold design. ISLPED 2005: 20-25 | |
| c52 | Rajeev R. Rao, David Blaauw, Dennis Sylvester, Charles J. Alpert, Sani R. Nassif: An efficient surface-based low-power buffer insertion algorithm. ISPD 2005: 86-93 | |
| c51 | Harmander Deogun, Rahul M. Rao, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka: Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk Minimization. ISQED 2005: 88-93 | |
| c50 | Harmander Deogun, Dennis Sylvester, David Blaauw: Gate-Level Mitigation Techniques for Neutron-Induced Soft Error Rate. ISQED 2005: 175-180 | |
| c49 | Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang: Performance Driven OPC for Mask Cost Reduction. ISQED 2005: 270-275 | |
| c48 | Rahul M. Rao, Kanak Agarwal, Anirudh Devgan, Kevin J. Nowka, Dennis Sylvester, Richard B. Brown: Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization. ISQED 2005: 284-290 | |
| c47 | Harmander Singh Deogun, Dennis Sylvester, Rahul M. Rao, Kevin J. Nowka: Adaptive MTCMOS for dynamic leakage and frequency control using variable footer strength. SoCC 2005: 147-150 | |
| c46 | Yu-Shiang Lin, Dennis Sylvester: A New Asymmetric Skewed Buffer Design for Runtime Leakage Power Reduction. VLSI Design 2005: 824-827 | |
| 2004 | ||
| j13 | Kanak Agarwal, Dennis Sylvester, David Blaauw: A library compatible driver output model for on-chip RLC transmission lines. IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 128-136 (2004) | |
| j12 | Ashish Srivastava, Dennis Sylvester: Minimizing total power by simultaneous V/sub dd//V/sub th/ assignment. IEEE Trans. on CAD of Integrated Circuits and Systems 23(5): 665-677 (2004) | |
| j11 | Kanak Agarwal, Dennis Sylvester, David Blaauw: A simple metric for slew rate of RC circuits based on two circuit moments. IEEE Trans. on CAD of Integrated Circuits and Systems 23(9): 1346-1354 (2004) | |
| j10 | Rajeev R. Rao, Ashish Srivastava, David Blaauw, Dennis Sylvester: Statistical analysis of subthreshold leakage current for VLSI circuits. IEEE Trans. VLSI Syst. 12(2): 131-139 (2004) | |
| j9 | Dongwoo Lee, David Blaauw, Dennis Sylvester: Gate oxide leakage current analysis and reduction for VLSI circuits. IEEE Trans. VLSI Syst. 12(2): 155-166 (2004) | |
| j8 | Himanshu Kaul, Dennis Sylvester: Low-power on-chip communication based on transition-aware global signaling (TAGS). IEEE Trans. VLSI Syst. 12(5): 464-476 (2004) | |
| j7 | Sarvesh H. Kulkarni, Dennis Sylvester: High performance level conversion for dual VDD design. IEEE Trans. VLSI Syst. 12(9): 926-936 (2004) | |
| c45 | Kanak Agarwal, Dennis Sylvester, David Blaauw: A simplified transmission-line based crosstalk noise model for on-chip RLC wiring. ASP-DAC 2004: 858-864 | |
| c44 | Luigi Capodieci, Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang: Toward a methodology for manufacturability-driven design rule exploration. DAC 2004: 311-316 | |
| c43 | Puneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester: Selective gate-length biasing for cost-effective runtime leakage control. DAC 2004: 327-330 | |
| c42 | Kanak Agarwal, Dennis Sylvester, David Blaauw, Frank Liu, Sani R. Nassif, Sarma B. K. Vrudhula: Variational delay metrics for interconnect timing analysis. DAC 2004: 381-384 | |
| c41 | Rajeev R. Rao, Anirudh Devgan, David Blaauw, Dennis Sylvester: Parametric yield estimation considering leakage variability. DAC 2004: 442-447 | |
| c40 | Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar: Tradeoffs between date oxide leakage and delay for dual Tox circuits. DAC 2004: 761-766 | |
| c39 | Ashish Srivastava, Dennis Sylvester, David Blaauw: Statistical optimization of leakage power considering process variations using dual-Vth and sizing. DAC 2004: 773-778 | |
| c38 | Harmander Deogun, Rajeev R. Rao, Dennis Sylvester, David Blaauw: Leakage-and crosstalk-aware bus encoding for total power reduction. DAC 2004: 779-782 | |
| c37 | Ashish Srivastava, Dennis Sylvester, David Blaauw: Power minimization using simultaneous gate sizing, dual-Vdd and dual-Vth assignment. DAC 2004: 783-787 | |
| c36 | Bo Zhai, David Blaauw, Dennis Sylvester, Krisztián Flautner: Theoretical and practical limits of dynamic voltage scaling. DAC 2004: 868-873 | |
| c35 | Dongwoo Lee, Harmander Deogun, David Blaauw, Dennis Sylvester: Simultaneous State, Vt and Tox Assignment for Total Standby Power Minimization. DATE 2004: 494-499 | |
| c34 | Ashish Srivastava, Dennis Sylvester, David Blaauw: Concurrent Sizing, Vdd and Vth Assignment for Low-Power Design. DATE 2004: 718-719 | |
| c33 | Ashish Srivastava, Dennis Sylvester: A general framework for probabilistic low-power design space exploration considering process variation. ICCAD 2004: 808-813 | |
| c32 | Saumil Shah, Kanak Agarwal, Dennis Sylvester: A New Threshold Voltage Assignment Scheme for Runtime Leakage Reduction in On-Chip Repeaters. ICCD 2004: 138-143 | |
| c31 | Anup Kumar Sultania, Dennis Sylvester, Sachin S. Sapatnekar: Transistor and Pin Reordering for Gate Oxide Leakage Reduction in Dual T{ox} Circuits. ICCD 2004: 228-233 | |
| c30 | Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka, Sani R. Nassif: Approaches to run-time and standby mode leakage reduction in global buses. ISLPED 2004: 188-193 | |
| c29 | Himanshu Kaul, Dennis Sylvester, Mark Anders, Ram Krishnamurthy: Spatial encoding circuit techniques for peak power reduction of on-chip high-performance buses. ISLPED 2004: 194-199 | |
| c28 | Sarvesh H. Kulkarni, Ashish Srivastava, Dennis Sylvester: A new algorithm for improved VDD assignment in low power dual VDD systems. ISLPED 2004: 200-205 | |
| c27 | Desmond Kirkpatrick, Peter J. Osler, Louis Scheffer, Prashant Saxena, Dennis Sylvester: The great interconnect buffering debate: are you a chicken or an ostrich? ISPD 2004: 61 | |
| c26 | Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester: Investigation of performance metrics for interconnect stack architectures. SLIP 2004: 23-29 | |
| c25 | Bo Zhai, David T. Blaauw, Dennis Sylvester, Krisztián Flautner: Extended dynamic voltage scaling for low power design. SoCC 2004: 389-394 | |
| 2003 | ||
| j6 | Takashi Sato, Yu Cao, Kanak Agarwal, Dennis Sylvester, Chenming Hu: Bidirectional closed-form transformation between on-chip coupling noise waveforms and interconnect delay-change curves. IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 560-572 (2003) | |
| j5 | Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: Improved a priori interconnect predictions and technology extrapolation in the GTX system. IEEE Trans. VLSI Syst. 11(1): 3-14 (2003) | |
| c24 | Ashish Srivastava, Dennis Sylvester: Minimizing total power by simultaneous Vdd/Vth assignment. ASP-DAC 2003: 400-403 | |
| c23 | Jan M. Rabaey, Dennis Sylvester, David Blaauw, Kerry Bernstein, Jerry Frenkil, Mark Horowitz, Wolfgang Nebel, Takayasu Sakurai, Andrew Yang: Reshaping EDA for power. DAC 2003: 15 | |
| c22 | Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang: A cost-driven lithographic correction methodology based on off-the-shelf sizing tools. DAC 2003: 16-21 | |
| c21 | Dongwoo Lee, Wesley Kwong, David Blaauw, Dennis Sylvester: Analysis and minimization techniques for total leakage considering gate oxide leakage. DAC 2003: 175-180 | |
| c20 | Kanak Agarwal, Dennis Sylvester, David Blaauw: An effective capacitance based driver output model for on-chip RLC interconnects. DAC 2003: 376-381 | |
| c19 | Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni: Pushing ASIC performance in a power envelope. DAC 2003: 788-793 | |
| c18 | Kanak Agarwal, Dennis Sylvester, David Blaauw: Simple metrics for slew rate of RC circuits based on two circuit moments. DAC 2003: 950-953 | |
| c17 | Yu Cao, Xiao-dong Yang, Xuejue Huang, Dennis Sylvester: Switch-Factor Based Loop RLC Modeling for Efficient Timing Analysis. ICCAD 2003: 848-854 | |
| c16 | Shidhartha Das, Kanak Agarwal, David Blaauw, Dennis Sylvester: Optimal Inductance for On-chip RLC Interconnections. ICCD 2003: 264- | |
| c15 | Rajeev R. Rao, Ashish Srivastava, David Blaauw, Dennis Sylvester: Statistical estimation of leakage current considering inter- and intra-die process variation. ISLPED 2003: 84-89 | |
| c14 | Dongwoo Lee, Wesley Kwong, David Blaauw, Dennis Sylvester: Simultaneous Subthreshold and Gate-Oxide Tunneling Leakage Current Analysis in Nanometer CMOS Design. ISQED 2003: 287-292 | |
| c13 | Robert Bai, Sarvesh H. Kulkarni, Wesley Kwong, Ashish Srivastava, Dennis Sylvester, David Blaauw: An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages. ISVLSI 2003: 149-154 | |
| e1 | Dennis Sylvester, Dirk Stroobandt, Louis Scheffer, Payman Zarkesh-Ha (Eds.): The 5th International Workshop on System-Level Interconnect Prediction (SLIP 2003), Monterey, CA, USA, April 5-6, 2003, Proceedings. ACM 2003, isbn 1-58113-627-7 | |
| 2002 | ||
| j4 | Yu Cao, Xuejue Huang, N. H. Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Dennis Sylvester, Chenming Hu: Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion. IEEE Trans. VLSI Syst. 10(6): 799-805 (2002) | |
| c12 | Himanshu Kaul, Dennis Sylvester, David Blaauw: Active shields: a new approach to shielding global wires. ACM Great Lakes Symposium on VLSI 2002: 112-117 | |
| c11 | Ashish Srivastava, Robert Bai, David Blaauw, Dennis Sylvester: Modeling and analysis of leakage power considering within-die process variations. ISLPED 2002: 64-67 | |
| c10 | ||
| c9 | Kanak Agarwal, Dennis Sylvester, David Blaauw: A library compatible driving point model for on-chip RLC interconnects. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 63-69 | |
| c8 | Himanshu Kaul, Dennis Sylvester, David Blaauw: Active shielding of RLC global interconnects. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 98-104 | |
| c7 | Kanak Agarwal, Yu Cao, Takashi Sato, Dennis Sylvester, Chenming Hu: Efficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis. VLSI Design 2002: 77- | |
| 2001 | ||
| j3 | Dennis Sylvester, Himanshu Kaul: Power-Driven Challenges in Nanometer Design. IEEE Design & Test of Computers 18(6): 12-22 (2001) | |
| c6 | ||
| 2000 | ||
| j2 | Dennis Sylvester, Kurt Keutzer: A global wiring paradigm for deep submicron design. IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 242-252 (2000) | |
| c5 | Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farinaz Koushanfar, Hua Lu, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: GTX: the MARCO GSRC technology extrapolation system. DAC 2000: 693-698 | |
| c4 | Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Sudhakar Muddu, Dirk Stroobandt, Dennis Sylvester: Effects of Global Interconnect Optimizations on Performance Estimation of Deep Submicron Design. ICCAD 2000: 56-61 | |
| c3 | ||
| 1999 | ||
| j1 | Dennis Sylvester, Kurt Keutzer: Rethinking Deep-Submicron Circuit Design. IEEE Computer 32(11): 25-33 (1999) | |
| c2 | Dennis Sylvester, Kurt Keutzer: Getting to the bottom of deep submicron II: a global wiring paradigm. ISPD 1999: 193-200 | |
| 1998 | ||
| c1 | ||
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