| 2012 | ||
|---|---|---|
| j7 | Zain-ul-Abdin, Bertil Svensson: Occam-pi for Programming of Massively Parallel Reconfigurable Architectures. Int. J. Reconfig. Comp. 2012 (2012) | |
| c22 | Zain-ul-Abdin, Essayas Gebrewahid, Bertil Svensson: Managing Dynamic Reconfiguration for Fault-tolerance on a Manycore Architecture. IPDPS Workshops 2012: 312-319 | |
| c21 | Ashraful Alam, Zain-ul-Abdin, Bertil Svensson: Parallelization of the estimation algorithm of the 3D structure tensor. ReConFig 2012: 1-6 | |
| 2011 | ||
| c20 | Zain-ul-Abdin, Anders Ahlander, Bertil Svensson: Programming Real-Time Autofocus on a Massively Parallel Reconfigurable Architecture Using Occam-pi. FCCM 2011: 194-201 | |
| c19 | Zain-ul-Abdin, Bertil Svensson: Occam-pi as a High-Level Language for Coarse-Grained Reconfigurable Architectures. IPDPS Workshops 2011: 236-243 | |
| 2010 | ||
| j6 | Björn Nilsson, Lars Bengtsson, Bertil Svensson: An Energy and Application Scenario Aware Active RFID Protocol. EURASIP J. Wireless Comm. and Networking 2010 (2010) | |
| 2009 | ||
| j5 | Zain-ul-Abdin, Bertil Svensson: Evolution in architectures and programming methodologies of coarse-grained reconfigurable computing. Microprocessors and Microsystems - Embedded Hardware Design 33(3): 161-178 (2009) | |
| c18 | Jerker Bengtsson, Bertil Svensson: Manycore performance analysis using timed configuration graphs. ICSAMOS 2009: 108-117 | |
| 2008 | ||
| j4 | Jerker Bengtsson, Bertil Svensson: A domain-specific approach for software development on Manycore platforms. SIGARCH Computer Architecture News 36(5): 2-10 (2008) | |
| c17 | Zain-ul-Abdin, Bertil Svensson: Using a CSP Based Programming Model for Reconfigurable Processor Arrays. ReConFig 2008: 343-348 | |
| c16 | Björn Nilsson, Lars Bengtsson, Bertil Svensson: Selecting back off algorithm in active RFID CSMA/CA based medium-access protocols. SIES 2008: 265-270 | |
| 2007 | ||
| c15 | Anders Ahlander, H. Hellsten, K. Lind, J. Lindgren, Bertil Svensson: Architectural Challenges in Memory-Intensive, Real-Time Image Forming. ICPP 2007: 35 | |
| c14 | Zain-ul-Abdin, Bertil Svensson: A Study of Design Efficiency with a High-Level Language for FPGAs. IPDPS 2007: 1-7 | |
| c13 | Björn Nilsson, Lars Bengtsson, Per-Arne Wiberg, Bertil Svensson: Protocols for Active RFID - The Energy Consumption Aspect. SIES 2007: 41-48 | |
| 2006 | ||
| c12 | Urban Bilstrup, Katrin Bilstrup, Bertil Svensson, Per-Arne Wiberg: Using Dual-Radio Nodes to Enable Quality of Service in a Clustered Wireless Mesh Network. ETFA 2006: 54-61 | |
| 2005 | ||
| c11 | Zain-ul-Abdin, Bertil Svensson: Compiling Stream-Language Applications to a Reconfigurable Array Processor. ERSA 2005: 274-275 | |
| c10 | Anders Ahlander, Anders Åström, Bertil Svensson, Mikael Taveniku: Meeting Engineer Efficiency Requirements in Highly Parallel Signal Processing by using Platforms. IASTED PDCS 2005: 693-700 | |
| c9 | Dennis Johnsson, Anders Ahlander, Bertil Svensson: Analyzing the Advantages of Run-Time Reconfiguration in Radar Signal Processing. IASTED PDCS 2005: 701-706 | |
| 2004 | ||
| c8 | Dennis Johnsson, Jerker Bengtsson, Bertil Svensson: Two-level Reconfigurable Architecture for High-Performance Signal Processing. ERSA 2004: 177-183 | |
| 2003 | ||
| c7 | Håkan Forsberg, Magnus Jonsson, Bertil Svensson: Key Issues in Implementing an Optoelectronic Planar Free-space Architecture for Signal Processing Applications. Applied Informatics 2003: 621-629 | |
| c6 | Urban Bilstrup, Katrin Sjöberg, Bertil Svensson, Per-Arne Wiberg: Capacity limitations in wireless sensor networks. ETFA (1) 2003: 529-536 | |
| 2001 | ||
| c5 | Håkan Forsberg, Bertil Svensson, Anders Ahlander, Magnus Jonsson: Radar Signal Processing Using Pipelines Optical Hypercube Interconnects. IPDPS 2001: 192 | |
| 1998 | ||
| j3 | ||
| c4 | Maarja Kruusmaa, Bertil Svensson: A Low-Risk Approach to Mobile Robot Path Planning. IEA/AIE (Vol. 2) 1998: 132-141 | |
| c3 | Mikael Taveniku, Anders Ahlander, Magnus Jonsson, Bertil Svensson: The VEGA Moderately Parallel MIMD, Moderately Parallel SIMD, Architectures for High Performance Array Signal Processing. IPPS/SPDP 1998: 226-232 | |
| 1997 | ||
| c2 | Magnus Jonsson, Bertil Svensson, Mikael Taveniku, Anders Ahlander: Fiber-Ribbon Pipeline Ring Network for High-Performance Distributed Computing Systems. ISPAN 1997: 138-143 | |
| 1993 | ||
| j2 | Lars Bengtsson, Kenneth Nilsson, Bertil Svensson: A processor array module for distributed, massively parallel, embedded computing. Microprocessing and Microprogramming 38(1-5): 529-537 (1993) | |
| 1992 | ||
| j1 | Tomas Nordström, Bertil Svensson: Using and Designing Massively Parallel Computers for Artificial Neural Neural Networks. J. Parallel Distrib. Comput. 14(3): 260-285 (1992) | |
| 1986 | ||
| b1 | Christer Fernström, Ivan Kruzela, Bertil Svensson: LUCAS Associative Array Processor: Design., Programming and Application Studies. Lecture Notes in Computer Science 216, Springer 1986, isbn 3-540-16445-6 | |
| 1983 | ||
| c1 | Lennart Ohlsson, Bertil Svensson: Matrix multiplication on LUCAS. IEEE Symposium on Computer Arithmetic 1983: 116-122 | |
Colors in the list of coauthors
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