Y. J. Su

Kuo-Tai Fan, Yu-Chang Tzeng, Y. F. Lin, Y. J. Su, Kun-Shan Chen: Tree identification using a distributed K-mean clustering algorithm. IGARSS 2010: 3446-3449

Yu-Chang Tzeng, Kuo-Tai Fan, Y. J. Su, Kun-Shan Chen: A Parallel Differential Box Counting Algorithm Applied to Hyperspectral Image Classifications. IGARSS (5) 2009: 216-219

C. F. Tsang, C. K. Chang, A. Krishnamoorthy, K. Y. Ee, Y. J. Su, H. Y. Li, W. H. Li, L. Y. Wong: A study of post-etch wet clean on electrical and reliability performance of Cu/low k interconnections. Microelectronics Reliability 45(3-4): 517-525 (2005)

H. Y. Li, Y. J. Su, C. F. Tsang, S. M. Sohan, V. N. Bliznetsov, L. Zhang: Process improvement of 0.13mum Cu/Low K (Black Diamond^TM) dual damascene interconnection. Microelectronics Reliability 45(7-8): 1134-1143 (2005)

C. F. Tsang, C. Y. Li, A. Krishnamoorthy, Y. J. Su, H. Y. Li, L. Y. Wong, W. H. Li, L. J. Tang, K. Y. Ee: Impact of barrier deposition process on electrical and reliability performance of Cu/CVD low k SiOCH metallization. Microelectronics Journal 35(9): 693-700 (2004)

Y. S. Zheng, Q. Guo, Y. J. Su, P. D. Foo: Polymer residue chemical composition analysis and its effect on via contact resistance in dual damascene copper interconnects process integration. Microelectronics Journal 34(2): 109-113 (2003)

Y. J. Su, S. Arisawa, Y. Takano, A. Ishii, T. Hatano, K. Togano: Study on the growth mechanism of Bi-2212 ribbon-like thin films on flat Ag substrate by the atomization technique. Microelectronics Journal 34(5-8): 679-681 (2003)

C. F. Tsang, V. N. Bliznetsov, Y. J. Su: Study and improvement of electrical performance of 130 nm Cu/CVD low k SiOCH interconnect related to via etch process. Microelectronics Journal 34(11): 1051-1058 (2003)

Y. S. Zheng, Y. J. Su, B. Yu, P. D. Foo: Investigation of defect on copper bond pad surface in copper/low k process integration. Microelectronics Reliability 43(8): 1311-1316 (2003)