Dimitrios Soudris

Nikolaos Zompakis, Antonis Papanikolaou, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor: Enabling Efficient System Configurations for Dynamic Wireless Applications Using System Scenarios. IJWIN 20(2): 140-156 (2013)

Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: On supporting rapid exploration of memory hierarchies onto FPGAs. Journal of Systems Architecture - Embedded Systems Design 59(2): 78-90 (2013)

Grigorios Lyras, Dimitrios Rodopoulos, Antonis Papanikolaou, Dimitrios Soudris: Hypervised transient SPICE simulations of large netlists & workloads on multi-processor systems. DATE 2013: 655-658

Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos: Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs. ACM Trans. Design Autom. Electr. Syst. 18(1): 11 (2012)

Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris: A novel framework for exploring 3-D FPGAs with heterogeneous interconnect fabric. TRETS 5(1): 4 (2012)

Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris: A Systematic Methodology for Reliability Improvements on SoC-Based Software Defined Radio Systems. VLSI Design 2012 (2012)

Kostas Siozios, Dimitrios Soudris: A low-cost fault tolerant solution targeting to commercial FPGA devices. AHS 2012: 46-53

Dionysios Diamantopoulos, Kostas Siozios, George Lentaris, Dimitrios Soudris, Marcos Avilés Rodrigálvarez: SPARTAN project: On profiling computer vision algorithms for rover navigation. AHS 2012: 174-181

Ioannis Koutras, Alexandros Bartzas, Dimitrios Soudris: Efficient Memory Allocations on a Many-Core Accelerator. ARCS Workshops 2012: 327-338

Lazaros Papadopoulos, Alexandros Bartzas, Dimitrios Soudris: Run-Time Dynamic Data Type Transformations. ARCS Workshops 2012: 351-362

Iraklis Anagnostopoulos, Alexandros Bartzas, Georgios Kathareios, Dimitrios Soudris: A divide and conquer based distributed run-time mapping methodology for many-core platforms. DATE 2012: 111-116

George Lentaris, Dionysios Diamantopoulos, Kostas Siozios, Dimitrios Soudris, Marcos Avilés Rodrigálvarez: Hardware implementation of stereo correspondence algorithm for the ExoMars mission. FPL 2012: 667-670

Harry Sidiropoulos, Kostas Siozios, Peter Figuli, Dimitrios Soudris, Michael Hübner: On Supporting Efficient Partial Reconfiguration with Just-In-Time Compilation. IPDPS Workshops 2012: 328-335

Dimitris Bekiaris, Ioannis Kosmadakis, George Stassinopoulos, Dimitrios Soudris, Theodore Laopoulos, Gregory Doumenis, Stylianos Siskos: Run-Time Measurement of Harvested Energy for Autarkic Sensor Operation. PATMOS 2012: 185-193

Dimitris Bekiaris, Efstathios Sotiriou-Xanthopoulos, George Economakos, Dimitrios Soudris: Systematic design and evaluation of a scalable reconfigurable multiplier scheme for HLS environments. ReCoSoC 2012: 1-8

Ioannis Koutras, Alexandros Bartzas, Dimitrios Soudris: Adaptive dynamic memory allocators by estimating application workloads. ICSAMOS 2012: 252-259

Kostas Siozios, Dimitrios Rodopoulos, Dimitrios Soudris: On Supporting Rapid Thermal Analysis. Computer Architecture Letters 10(2): 53-56 (2011)

Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Zhonghai Lu, Dimitrios Soudris, Axel Jantsch: Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations. Embedded Systems Letters 3(2): 66-69 (2011)

Kostas Siozios, Dimitrios Soudris: A Tabu-Based Partitioning and Layer Assignment Algorithm for 3-D FPGAs. Embedded Systems Letters 3(3): 97-100 (2011)

Nikolas Kroupis, Dimitrios Soudris: FILESPPA: Fast Instruction Level Embedded System Power and Performance Analyzer. Microprocessors and Microsystems - Embedded Hardware Design 35(3): 329-342 (2011)

Sotirios Xydis, George Economakos, Dimitrios Soudris, Kiamal Z. Pekmestzi: High Performance and Area Efficient Flexible DSP Datapath Synthesis. IEEE Trans. VLSI Syst. 19(3): 429-442 (2011)

Kostas Siozios, Dimitrios Rodopoulos, Dimitrios Soudris: Quick_Hotspot: A Software Supported Methodology for Supporting Run-Time Thermal Analysis at MPSoC Designs. ARCS Workshops 2011

Kostas Siozios, Dimitrios Soudris: Trading Fault-Masking with Performance Overhead for FPGAs. ARCS Workshops 2011

Sotirios Xydis, Ioannis S. Stamelakos, Alexandros Bartzas, Dimitrios Soudris: Runtime Tuning of Dynamic Memory Management For Mitigating Footprint-Fragmentation Variations. ARCS Workshops 2011

Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: A Framework for Architecture-Level Exploration of Communication Intensive Applications onto 3-D FPGAs. FPL 2011: 30-33

Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: A Methodology and Tool Framework for Supporting Rapid Exploration of Memory Hierarchies in FPGAs. FPL 2011: 238-243

Dionysios Diamantopoulos, Panagiotis Galiatsatos, A. Karachalios, George Lentaris, Dionisios I. Reisis, Dimitrios Soudris: Configurable baseband digital transceiver for Gbps wireless 60 GHz communications. ICECS 2011: 192-195

Filippos Toufexis, Antonis Papanikolaou, Dimitrios Soudris, George I. Stamoulis, Sotiris Bantas: Power, performance and area prediction of 3D ICs during early stage design exploration in 45nm. ICECS 2011: 715-718

Efstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, George Economakos, Dimitrios Soudris: Design and experimentation with low-power morphable multipliers. ICECS 2011: 752-755

Michael Hübner, Peter Figuli, Romuald Girardey, Dimitrios Soudris, K. Siozios, Jürgen Becker: A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture. IPDPS Workshops 2011: 143-149

Kostas Siozios, Antonis Papanikolaou, Dimitrios Soudris: CAD tools for designing 3D integrated systems. ISCAS 2011: 2229-2232

Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: A Framework for Architecture-Level Exploration of 3-D FPGA Platforms. PATMOS 2011: 298-307

Dimitris Bekiaris, George Economakos, Efstathios Sotiriou-Xanthopoulos, Dimitrios Soudris: Low-Power Reconfigurable Component Utilization in a High-Level Synthesis Flow. ReConFig 2011: 428-433

Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Ettore Speziale, Diego Melpignano, J. M. Zins, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Junaid Ansari, Petri Mähönen, Bart Vanthournout: Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach. ReCoSoC 2011: 1-7

Kostas Siozios, Dionysios Diamantopoulos, Ioannis Kostavelis, Evangelos Boukas, Lazaros Nalpantidis, Dimitrios Soudris, Antonios Gasteratos, Marcos Avilés, Iraklis Anagnostopoulos: SPARTAN project: Efficient implementation of computer vision algorithms onto reconfigurable platform targeting to space applications. ReCoSoC 2011: 1-9

Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris: Thermal optimization for micro-architectures through selective block replication. ICSAMOS 2011: 59-66

Nikolaos Zompakis, Antonis Papanikolaou, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor: Enabling efficient system configurations for dynamic wireless baseband engines using system scenarios. SiPS 2011: 305-310

Wolfgang Karl, Dimitrios Soudris (Eds.): ARCS 2011 - 24th International Conference on Architecture of Computing Systems 2011, Workshop Proceedings, February 22-23, 2011, Como, Italy. VDE-Verlag 2011, isbn 978-3-8007-3333-0

Kostas Siozios, Dimitrios Soudris: A Methodology for Alleviating the Performance Degradation of TMR Solutions. Embedded Systems Letters 2(4): 111-114 (2010)

Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis: A Novel Allocation Methodology for Partial and Dynamic Bitstream Generation for FPGA Architectures. Journal of Circuits, Systems, and Computers 19(3): 701-717 (2010)

Alexandros Bartzas, Miguel Peón Quirós, Christophe Poucet, Christos Baloukas, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias: Software metadata: Systematic characterization of the memory behaviour of dynamic applications. Journal of Systems and Software 83(6): 1051-1075 (2010)

Kostas Siozios, Dimitrios Soudris, Dionisios N. Pnevmatikatos: A Framework for Enabling Fault Tolerance in Reconfigurable Architectures. ARC 2010: 257-268

Nikolaos Zompakis, Vasileios Tsoutsouras, Alexandros Bartzas, Dimitrios Soudris, Georgios P. Pavlos: Dynamic Frequency Scaling for MPSoCs based on Chaotic Workload Analysis. ARCS Workshops 2010: 305-312

Alienor Richard, Dragomir Milojevic, Frédéric Robert, Alexandros Bartzas, Antonis Papanikolaou, Kostas Siozios, Dimitrios Soudris: Fast Design Space Exploration Environment Applied on NoC's for 3D-Stacked MPSoC's. ARCS Workshops 2010: 319-324

Arindam Mallik, Peter Marwedel, Dimitrios Soudris, Sander Stuijk: MNEMEE: a framework for memory management and optimization of static and dynamic data in MPSoCs. CASES 2010: 257-258

Yiannis Iosifidis, Arindam Mallik, Stylianos Mamagkakis, Eddy de Greef, Alexandros Bartzas, Dimitrios Soudris, Francky Catthoor: A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms. DAC 2010: 549-554

George Economakos, Sotirios Xydis, Ioannis Koutras, Dimitrios Soudris: Construction of dual mode components for reconfiguration aware high-level synthesis. DATE 2010: 1357-1360

Harry Sidiropoulos, Kostas Siozios, Dimitrios Soudris: NAROUTO: An open-source framework for supporting architecture-level exploration at heterogeneous FPGAS. ICECS 2010: 527-530

Ioannis Koutras, Antonis Papanikolaou, George Economakos, Dimitrios Soudris: BIT-width exploration over 3D architectures using high-level synthesis. ICECS 2010: 535-538

Kostas Siozios, Iraklis Anagnostopoulos, Dimitrios Soudris: Multiple Vdd on 3D NoC architectures. ICECS 2010: 831-834

Sotirios Xydis, Christos Skouroumounis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos: Designing efficient DSP datapaths through compiler-in-the-loop exploration methodology. ISCAS 2010: 2598-2601

Sotirios Xydis, Christos Skouroumounis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos: Efficient High Level Synthesis Exploration Methodology Combining Exhaustive and Gradient-Based Pruned Searching. ISVLSI 2010: 104-109

Iasonas Filippopoulos, Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris, George Economakos: Systematic Exploration of Energy-Efficient Application-Specific Network-on-Chip Architectures. ISVLSI 2010: 133-138

Kostas Siozios, Iraklis Anagnostopoulos, Dimitrios Soudris: A High-Level Mapping Algorithm Targeting 3D NoC Architectures with Multiple Vdd. ISVLSI 2010: 444-445

Kostas Siozios, Dimitrios Soudris, Dionisios N. Pnevmatikatos: Towards Supporting Fault-Tolerance in FPGAs. ISVLSI 2010: 446-447

Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos: High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor Architectures. ISVLSI 2010: 486-487

Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout: 2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures. ISVLSI 2010: 494-499

Christos Baloukas, Lazaros Papadopoulos, Dimitrios Soudris, Sander Stuijk, Olivera Jovanovic, Florian Schmoll, Daniel Cordes, Robert Pyka, Arindam Mallik, Stylianos Mamagkakis, François Capman, Séverin Collet, Nikolaos Mitas, Dimitrios Kritharidis: Mapping Embedded Applications on MPSoCs: The MNEMEE Approach. ISVLSI 2010: 512-517

Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin: Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. ISVLSI 2010: 518-523

Dimitris Bekiaris, Antonis Papanikolaou, Christos Papameletis, Dimitrios Soudris, George Economakos, Kiamal Z. Pekmestzi: A Temperature-Aware Time-Dependent Dielectric Breakdown Analysis Framework. PATMOS 2010: 73-83

Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, Kiamal Z. Pekmestzi: Custom multi-threaded Dynamic Memory Management for Multiprocessor System-on-Chip platforms. ICSAMOS 2010: 102-109

Christos Baloukas, Lazaros Papadopoulos, Robert Pyka, Dimitrios Soudris, Peter Marwedel: An automatic framework for dynamic data structures optimization in C. VLSI-SoC 2010: 155-160

Nikolas Kroupis, Dimitrios Soudris: High-level estimation methodology for designing the instruction cache memory of programmable embedded platforms. IET Computers & Digital Techniques 3(2): 205-221 (2009)

Marios Kesoulis, Christos S. Koukourlis, J. N. Lygouras, Dimitrios Soudris, John N. Sahalos: Design and implementation of a DDS-based multi-carrier GMSK modulator. Int. J. Communication Systems 22(8): 971-987 (2009)

Alexandros Bartzas, Lazaros Papadopoulos, Dimitrios Soudris: A system-level design methodology for application-specific networks-on-chip. J. Embedded Computing 3(3): 167-177 (2009)

Alexandros Bartzas, Miguel Peón Quirós, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias: Direct memory access usage optimization in network applications for reduced memory latency and energy consumption. J. Embedded Computing 3(3): 241-254 (2009)

Kostas Siozios, Dimitrios Soudris: Designing a novel high-performance FPGA architecture for data intensive applications. J. Real-Time Image Processing 4(2): 155-166 (2009)

Christos Baloukas, José Luis Risco-Martín, David Atienza, Christophe Poucet, Lazaros Papadopoulos, Stylianos Mamagkakis, Dimitrios Soudris, José Ignacio Hidalgo, Francky Catthoor, Juan Lanchares: Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems. Journal of Systems and Software 82(4): 590-602 (2009)

Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Soudris: A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs. DATE 2009: 172-177

Nikolas Kroupis, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Dimitrios Soudris: Compilation Technique for Loop Overhead Minimization. DSD 2009: 419-426

Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris: Application-Specific Temperature Reduction Systematic Methodology for 2D and 3D Networks-on-Chip. PATMOS 2009: 86-95

Nikolaos Zompakis, Martin Trautmann, Alexandros Bartzas, Stylianos Mamagkakis, Dimitrios Soudris, Liesbet Van der Perre, Francky Catthoor: Multi-granularity NoC Simulation Framework for Early Phase Exploration of SDR Hardware Platforms. PATMOS 2009: 165-174

Alexandros Bartzas, Christos Baloukas, Dimitrios Soudris, Konstantinos Potamianos, Fragkiskos Ieromnimon, Nikolaos S. Voros: Dynamic Data Type Optimization and Memory Assignment Methodologies. PATMOS 2009: 175-185

Kostas Siozios, Alexandros Bartzas, Dimitrios Soudris: Architecture-Level Exploration of Alternative Interconnection Schemes Targeting 3D FPGAs: A Software-Supported Methodology. Int. J. Reconfig. Comp. 2008 (2008)

Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis: Designing a General-Purpose Interconnection Architecture for Field Programmable Gate Arrays. J. Low Power Electronics 4(1): 34-47 (2008)

Kostas Siozios, Dimitrios Soudris: A Power-Aware Placement and Routing Algorithm Targeting 3D FPGAs. J. Low Power Electronics 4(3): 275-289 (2008)

Lazaros Papadopoulos, Christos Baloukas, Dimitrios Soudris: Exploration methodology of dynamic data structures in multimedia and network applications for embedded platforms. Journal of Systems Architecture - Embedded Systems Design 54(11): 1030-1038 (2008)

Minas Dasygenis, K. Mitroglou, Dimitrios Soudris, Adonios Thanailakis: A Full-Adder-Based Methodology for the Design of Scaling Operation in Residue Number System. IEEE Trans. on Circuits and Systems 55-I(2): 546-558 (2008)

Sotirios Xydis, George Economakos, Dimitrios Soudris, Kiamal Z. Pekmestzi: Mapping DSP Applications onto High-Performance Architectural Templates with Inlined Flexibility. AHS 2008: 346-353

Alexandros Bartzas, Miguel Peón Quirós, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias: Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information. ASP-DAC 2008: 434-439

Kostas Siozios, Dimitrios Soudris: An Efficient Approach for Managing Power Consumption Hotspots Distribution on 3D FPGAs. PATMOS 2008: 439-448

Marios Kesoulis, Dimitrios Soudris, Christos S. Koukourlis, Adonios Thanailakis: Systematic methodology for designing low power direct digital frequency synthesisers. IET Circuits, Devices & Systems 1(4): 293-304 (2007)

Laurence Tianruo Yang, José G. Delgado-Frias, Yiming Li, Mohammed Y. Niamat, Dimitrios Soudris, Srinivasa Vemuru: Preface. Integration 40(2): 61 (2007)

Konstantinos Tatas, George Koutroumpezis, Dimitrios Soudris, Adonios Thanailakis: Architecture design of a coarse-grain reconfigurable multiply-accumulate unit for data-intensive applications. Integration 40(2): 74-93 (2007)

Stylianos Mamagkakis, Alexandros Bartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis: Systematic methodology for exploration of performance - Energy trade-offs in network applications using Dynamic Data Type refinement. Journal of Systems Architecture 53(7): 417-436 (2007)

Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: Automated framework for partitioning DSP applications in hybrid reconfigurable platforms. Microprocessors and Microsystems 31(1): 1-14 (2007)

Lazaros Papadopoulos, Christos Baloukas, Dimitrios Soudris, Konstantinos Potamianos, Nikolaos S. Voros: Data Structure Exploration of Dynamic Applications. PACT 2007: 421

Kostas Siozios, Stelios Mamagkakis, Dimitrios Soudris, Antonios Thanailakis: Designing Heterogeneous FPGAs with Multiple SBs. ARC 2007: 91-96

Stylianos Mamagkakis, Dimitrios Soudris, Francky Catthoor: Middleware design optimization of wireless protocols based on the exploitation of dynamic input patterns. DATE 2007: 1036-1041

Christos Baloukas, Lazaros Papadopoulos, Stylianos Mamagkakis, Dimitrios Soudris: Component Based Library Implementation of Abstract Data Types for Resource Management Customization of Embedded Systems. ESTImedia 2007: 99-104

Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavlidis, Dimitrios Soudris: Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support. FPL 2007: 652-655

Kostas Siozios, Dimitrios Soudris: A Novel Methodology for Temperature-Aware Placement and Routing of FPGAs. ISVLSI 2007: 55-60

Lazaros Papadopoulos, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris: Application - specific NoC platform design based on System Level Optimization. ISVLSI 2007: 311-316

Lazaros Papadopoulos, Dimitrios Soudris: System-Level Application-Specific NoC Design for Network and Multimedia Applications. PATMOS 2007: 1-9

Miguel Peón Quirós, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption. PATMOS 2007: 373-383

Nikolas Kroupis, Dimitrios Soudris: Design Methodology and Software Tool for Estimation of Multi-level Instruction Cache Memory Miss Rate. PATMOS 2007: 505-515

Lazaros Papadopoulos, Christos Baloukas, Nikolaos Zompakis, Dimitrios Soudris: Systematic Data Structure Exploration of Multimedia and Network Applications realized Embedded Systems. ICSAMOS 2007: 58-65

David Atienza, Christos Baloukas, Lazaros Papadopoulos, Christophe Poucet, Stylianos Mamagkakis, José Ignacio Hidalgo, Francky Catthoor, Dimitrios Soudris, Juan Lanchares: Optimization of dynamic data structures in multimedia embedded systems using evolutionary computation. SCOPES 2007: 31-40

Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavlidis, Dimitrios Soudris: A software-supported methodology for designing high-performance 3D FPGA architectures. VLSI-SoC 2007: 54-59

Nikolaos Zompakis, Lazaros Papadopoulos, Georgios Ch. Sirakoulis, Dimitrios Soudris: Implementing cellular automata modeled applications on network-on-chip platforms. VLSI-SoC 2007: 288-291

Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis: A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck. CoRR abs/0710.4656 (2007)

Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms. CoRR abs/0710.4844 (2007)

Stylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis: Reducing memory fragmentation in network applications with dynamic memory allocators optimized for performance. Computer Communications 29(13-14): 2612-2620 (2006)

David Atienza, Stylianos Mamagkakis, Francesco Poletti, Jose Manuel Mendias, Francky Catthoor, Luca Benini, Dimitrios Soudris: Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems. Integration 39(2): 113-130 (2006)

Athanasios Kakarountas, Nikolaos D. Zervas, George Theodoridis, Haralambos Michail, Dimitrios Soudris: Power Management Through Dynamic Frequency Scaling for Low and Medium Bit-Rate Digital Receivers. J. Low Power Electronics 2(3): 356-364 (2006)

David Atienza, Jose Manuel Mendias, Stylianos Mamagkakis, Dimitrios Soudris, Francky Catthoor: Systematic dynamic memory management design methodology for reduced memory footprint. ACM Trans. Design Autom. Electr. Syst. 11(2): 465-489 (2006)

Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Adonios Thanailakis: A combined DMA and application-specific prefetching approach for tackling the memory latency bottleneck. IEEE Trans. VLSI Syst. 14(3): 279-291 (2006)

Nikolas Kroupis, Nikolaos D. Zervas, Minas Dasygenis, Konstantinos Tatas, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis: Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors. VLSI Signal Processing 44(1-2): 153-171 (2006)

Alexandros Bartzas, Stylianos Mamagkakis, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis: Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications. DATE 2006: 740-745

Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias: Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems. DATE 2006: 874-875

Stylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris: Energy-efficient dynamic memory allocators at the middleware level of embedded systems. EMSOFT 2006: 215-222

Nikolas Kroupis, Stylianos Mamagkakis, Dimitrios Soudris: An Estimation Methodology for Designing Instruction Cache Memory of Embedded Systems. ESTImedia 2006: 21-26

K. Siozios, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis: A novel methodology for designing high-performance and low-energy FPGA routing architecture. FPGA 2006: 224

Kostas Siozios, Dimitrios Soudris: Wire Segment Length and Switch Box Co-Optimization for FPGA Architectures. FPL 2006: 1-4

Kostas Siozios, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis: Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications. IPDPS 2006

Alexandros Bartzas, Miguel Peón Quirós, Stylianos Mamagkakis, David Atienza, Francky Catthoor, Dimitrios Soudris, M. Mendias: Systematic design flow for dynamic data management in visual texture decoder of MPEG-4. ISCAS 2006

Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis: A novel methodology for designing high-performance and low-power FPGA interconnection targeting DSP applications. ISCAS 2006

Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis: Designing Alternative FPGA Implementations Using Spatial Data from Hardware Resources. PATMOS 2006: 403-414

Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis: Efficient Power Management Strategy of FPGAs Using a Novel Placement Technique. VLSI-SoC 2006: 204-209

Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Costas E. Goutis: A method for partitioning applications in hybrid reconfigurable architectures. Design Autom. for Emb. Sys. 10(1): 27-47 (2005)

Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Dimitrios Soudris, Antonios Thanailakis, Spiridon Nikolaidis, Stilianos Siskos: A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications. IEICE Transactions 88-D(7): 1369-1380 (2005)

Konstantinos Tatas, Dimitrios Soudris, D. Siomos, Adonios Thanailakis: A Novel Division Algorithm and Architectures for Parallel and Sequential Processing. Journal of Circuits, Systems, and Computers 14(2): 281-296 (2005)

Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis: Memory power optimization of hardware implementations of multimedia applications onto FPGA platforms. J. Embedded Computing 1(3): 353-362 (2005)

Vasilios Kalenteridis, Haroula Pournara, K. Siozios, Konstantinos Tatas, Nikolaos Vassiliadis, Ilias Pappas, George Koutroumpezis, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris: A complete platform and toolset for system implementation on fine-grain reconfigurable hardware. Microprocessors and Microsystems 29(6): 247-259 (2005)

Nikolaos D. Zervas, George Theodoridis, Dimitrios Soudris: Behavioral-level event-driven power management for DECT digital receivers. Microelectronics Journal 36(2): 163-172 (2005)

Dimitrios Soudris, Spiridon Nikolaidis, Stilianos Siskos, Konstantinos Tatas, K. Siozios, George Koutroumpezis, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Adonios Thanailakis: AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow. ASP-DAC 2005: 3-4

Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis: A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck. DATE 2005: 946-947

Kostas Siozios, Konstantinos Tatas, George Koutroumpezis, D. J. Soudris, Adonios Thanailakis: An Integrated Framework for Architecture Level Exploration of Reconfigurable Platform. FPL 2005: 658-661

Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis: A Low-Energy FPGA: Architecture Design and Software-Supported Design Flow. FPL 2005: 707-708

Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms. IPDPS 2005

Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis: DAGGER: A Novel Generic Methodology for FPGA Bitstream Generation and Its Software Tool Implementation. IPDPS 2005

Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A methodology for partitioning DSP applications in hybrid reconfigurable systems. ISCAS (2) 2005: 1206-1209

Nikolas Kroupis, Minas Dasygenis, K. Markou, Dimitrios Soudris, Adonios Thanailakis: A modified spiral search motion estimation algorithm and its embedded system implementation. ISCAS (4) 2005: 3347-3350

Minas Dasygenis, Erik Brockmeyer, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis: Improving the Memory Bandwidth Utilization Using Loop Transformations. PATMOS 2005: 117-126

Nikolas Kroupis, Minas Dasygenis, Dimitrios Soudris, Antonios Thanailakis: A Modified Spiral Search Algorithm and its Embedded Hardware Implementation. IEC (Prague) 2005: 375-378

Stylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, José M. Mendías, Antonios Thanailakis: Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications. WWIC 2005: 354-364

Christos Drosos, Chrissavgi Dre, Dimitris Metafas, Dimitrios Soudris, Spyros Blionas: The low power analogue and digital baseband processing parts of a novel multimode DECT/GSM/DCS1800 terminal. Microelectronics Journal 35(7): 609-620 (2004)

Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms. DATE 2004: 247-252

David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Dynamic Memory Management Design Methodology for Reduced Memory Footprint in Multimedia and Wireless Network Applications. DATE 2004: 532-537

David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Reducing memory accesses with a system-level design methodology in customized dynamic memory management. ESTImedia 2004: 93-98

Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis: Accelerating DSP Applications on a Mixed Granularity Platform with a New Reconfigurable Coarse-Grain Data-Path. FCCM 2004: 275-276

Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis: A novel coarse-grain reconfigurable data-path for accelerating DSP kernels. FPGA 2004: 252

Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis: Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path. FPL 2004: 868-873

K. Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis: A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development. FPL 2004: 1116-1118

Vasilios Kalenteridis, Haroula Pournara, K. Siozios, Konstantinos Tatas, George Koutroumpezis, Ilias Pappas, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris, Adonios Thanailakis: An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development. IPDPS 2004

Evaggelia Theochari, Konstantinos Tatas, Dimitrios Soudris, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas, Antonios Thanailakis: A reusable IP FFT core for DSP applications. ISCAS (3) 2004: 621-624

David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Modular Construction and Power Modelling of Dynamic Memory Managers for Embedded Systems. PATMOS 2004: 510-520

Kostas Masselos, Spyros Blionas, Jean-Yves Mignolet, A. Foster, Dimitrios Soudris, Spiridon Nikolaidis: Hardware Building Blocks of a Mixed Granularity Reconfigurable System-on-Chip Platform. PATMOS 2004: 613-622

Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Constantinos E. Goutis: Mapping Computational Intensive Applications to a New Coarse-Grained Reconfigurable Data-Path. PATMOS 2004: 652-661

Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis: A Novel Data-Path for Accelerating DSP Kernels. SAMOS 2004: 363-372

Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis: Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications. SAMOS 2004: 540-549

Stylianos Mamagkakis, Alexandros Mpartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias, Antonios Thanailakis: Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology. WWIC 2004: 26-37

Konstantinos Tatas, Minas Dasygenis, Nikolas Kroupis, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis: Data memory power optimization and performance exploration of embedded systems for implementing motion estimation algorithms. Real-Time Imaging 9(6): 371-386 (2003)

Konstantinos Tatas, K. Siozios, Dimitrios Soudris, Adonios Thanailakis: Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms. FPL 2003: 1032-1035

Dimitrios Soudris, Marios Kesoulis, Christos S. Koukourlis, Adonios Thanailakis, Spyros Blionas: Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size. ISCAS (2) 2003: 73-76

Dimitrios Soudris, K. Sgouropoulos, Konstantinos Tatas, Vasilis F. Pavlidis, Adonios Thanailakis: A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems. ISCAS (5) 2003: 129-132

Konstantinos Tatas, K. Siozios, Dimitrios Soudris, Adonios Thanailakis, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas: Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms. PATMOS 2003: 430-439

Konstantinos Tatas, K. Siozios, Nikolaos Vassiliadis, D. J. Soudris, Spiridon Nikolaidis, Stilianos Siskos, Adonios Thanailakis: FPGA Architecture Design and Toolset for Logic Implementation. PATMOS 2003: 607-616

Marios Kesoulis, Dimitrios Soudris, Christos S. Koukourlis, Adonios Thanailakis: Designing Low Power Direct Digital Frequency Synthesizers. VLSI-SOC 2003: 105-110

S. Theoharis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis, Adonios Thanailakis: A fast and accurate delay dependent method for switching estimation of large combinational circuits. Journal of Systems Architecture 48(4-5): 113-124 (2002)

Nikolaos D. Liveris, Nikolaos D. Zervas, Dimitrios Soudris, Constantinos E. Goutis: A Code Transformation-Based Methodology for Improving I-Cache Performance of DSP Applications. DATE 2002: 977-983

George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Spyros Blionas, Kostas Masselos, Adonios Thanailakis: Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations. FPL 2002: 1027-1036

Antonios Atsalakis, Nikos Papamarkos, Dimitrios Soudris, Nikolas Kroupis: A window-based color quantization technique and its embedded implementation. ICIP (2) 2002: 365-368

Athanasios Kakarountas, K. Papadomanolakis, Spiridon Nikolaidis, Dimitrios Soudris, Constantinos E. Goutis: Confronting violations of the TSCG(T) in low-power design. ISCAS (4) 2002: 313-316

Nikolaos D. Zervas, G. Pagkless, Minas Dasygenis, Dimitrios Soudris: Performance and Power Comparative Study of Discrete Wavelet Transform on Programmable Processors. PATMOS 2002: 323-331

Nikolas Kroupis, Minas Dasygenis, Antonios Argyriou, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis, Nikolaos D. Zervas, Constantinos E. Goutis: Power, performance and area exploration of block matching algorithms mapped on programmable processors. ICIP (3) 2001: 728-731

I. Thoidis, Dimitrios Soudris, J. M. Fernandez, Adonios Thanailakis: The circuit design of multiple-valued logic voltage-mode adders. ISCAS (4) 2001: 162-165

Christos Drosos, Chrissavgi Dre, Spyros Blionas, Dimitrios Soudris: On the implementation of a baseband processor for a portable dual mode DECT/GSM terminal. ISCAS (4) 2001: 334-337

D. J. Soudris, M. M. Dasigenis, S. K. Vasilopoulou, Adonios Thanailakis: A CAD tool for architecture level exploration and automatic generation of RNS converters. ISCAS (4) 2001: 730-733

Nikolaos D. Zervas, I. Tagopoulos, Vassilis Spiliotopoulos, Giorgos P. Anagnostopoulos, Dimitrios Soudris, Constantinos E. Goutis: Performance comparison of DWT scheduling alternatives on programmable platforms. ISCAS (2) 2001: 761-764

Konstantinos Tatas, Antonios Argyriou, Minas Dasygenis, Dimitrios Soudris, Nikolaos D. Zervas: Memory Hierarchy Optimization of Multimedia Applications on Programmable Embedded Cores 1. ISQED 2001: 456-461

Nikolaos D. Zervas, S. Theoharis, Athanasios Kakarountas, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis: Reducing Power Consumption through Dynamic Frequency Scaling for a Class of Digital Receivers. PATMOS 2000: 47-55

Dimitrios Soudris, Nikolaos D. Zervas, Antonios Argyriou, Minas Dasygenis, Konstantinos Tatas, Constantinos E. Goutis, Adonios Thanailakis: Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications. PATMOS 2000: 243-254

Dimitrios Soudris, Peter Pirsch, Erich Barke (Eds.): Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation, 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000, Proceedings. Lecture Notes in Computer Science 1918, Springer 2000, isbn 3-540-41068-6

M. Perakis, A. E. Tzimas, E. G. Metaxakis, Dimitrios Soudris, Grigorios A. Kalivas, C. Katis, Chrissavgi Dre, Constantinos E. Goutis, Adonios Thanailakis, Thanos Stouraitis: The VLSI implementation of a baseband receiver for DECT-based portable applications. ISCAS (1) 1999: 198-201

George Theodoridis, S. Theoharis, Dimitrios Soudris, Thanos Stouraitis, Constantinos E. Goutis: An efficient probabilistic method for logic circuits using real delay gate model. ISCAS (1) 1999: 286-289

I. Thoidis, Dimitrios Soudris, Ioannis Karafyllidis, Adonios Thanailakis, Thanos Stouraitis: Multiple-Valued Logic Voltage-Mode Storage Circuits Based On True-Single-Phase Clocked Logic. Great Lakes Symposium on VLSI 1998: 83-88

Efstathios D. Kyriakis-Bitzaros, Dimitrios Soudris, Constantinos E. Goutis: Transformation of Nested Loops into Uniform Recurrences and their Mapping to Regular Processor Arrays. Journal of Circuits, Systems, and Computers 6(3): 243-266 (1996)

Dimitrios Soudris, P. D. Georgakopoulos, Constantinos E. Goutis: A Systematic Methodology for Designing Multilevel Systolic Architectures. ISCAS 1993: 1738-1741

Vassilis Paliouras, Dimitrios Soudris, Thanos Stouraitis: Methodology for the Design of Signed-digit DSP Processors. ISCAS 1993: 1833-1836

Dimitrios Soudris, Michael K. Birbas, Constantinos E. Goutis: Direct mapping of nested loops on piecewise regular processor arrays. Algorithms and Parallel VLSI Architectures 1991: 145-150