| 2013 | ||
|---|---|---|
| j37 | Kuntal Nanshi, Fabio Somenzi: Using Abstraction to Guide the Search for Long Error Traces. IEEE Trans. on CAD of Integrated Circuits and Systems 32(3): 453-466 (2013) | |
| 2012 | ||
| c106 | Zyad Hassan, Aaron R. Bradley, Fabio Somenzi: Incremental, Inductive CTL Model Checking. CAV 2012: 532-547 | |
| c105 | Yan Zhang, Sriram Sankaranarayanan, Fabio Somenzi: Piecewise linear modeling of nonlinear devices for formal verification of analog circuits. FMCAD 2012: 196-203 | |
| 2011 | ||
| c104 | HyoJung Han, HoonSang Jin, Fabio Somenzi: Clause simplification through dominator analysis. DATE 2011: 143-148 | |
| c103 | ||
| c102 | Aaron R. Bradley, Fabio Somenzi, Zyad Hassan, Yan Zhang: An incremental approach to model checking progress properties. FMCAD 2011: 144-153 | |
| 2010 | ||
| j36 | HyoJung Han, Fabio Somenzi, HoonSang Jin: Making Deduction More Effective in SAT Solvers. IEEE Trans. on CAD of Integrated Circuits and Systems 29(8): 1271-1284 (2010) | |
| 2009 | ||
| c101 | Kuntal Nanshi, Fabio Somenzi: Constraints in one-to-many concretization for abstraction refinement. DAC 2009: 569-574 | |
| c100 | ||
| c99 | Hyondeuk Kim, Fabio Somenzi, HoonSang Jin: Efficient Term-ITE Conversion for Satisfiability Modulo Theories. SAT 2009: 195-208 | |
| c98 | ||
| 2008 | ||
| c97 | Hyondeuk Kim, HoonSang Jin, Kavita Ravi, Petr Spacek, John Pierce, Robert P. Kurshan, Fabio Somenzi: Application of Formal Word-Level Analysis to Constrained Random Simulation. CAV 2008: 487-490 | |
| c96 | Kuntal Nanshi, Fabio Somenzi: Improved Visibility in One-to-Many Trace Concretization. DATE 2008: 819-824 | |
| c95 | ||
| 2007 | ||
| j35 | Roderick Bloem, Marco Roveri, Fabio Somenzi: Preface. Electr. Notes Theor. Comput. Sci. 174(4): 1 (2007) | |
| j34 | Hyondeuk Kim, HoonSang Jin, Fabio Somenzi: Disequality Management in Integer Difference Logic via Finite Instantiations. JSAT 3(1-2): 47-66 (2007) | |
| c94 | HyoJung Han, Fabio Somenzi: Alembic: An Efficient Algorithm for CNF Preprocessing. DAC 2007: 582-587 | |
| 2006 | ||
| b2 | Gary D. Hachtel, Fabio Somenzi: Logic synthesis and verification algorithms. Springer 2006, isbn 978-0-387-31004-6, pp. I-XXIII, 1-564 | |
| j33 | Mohammad Awedh, Fabio Somenzi: Termination Criteria for Bounded Model Checking: Extensions and Comparison. Electr. Notes Theor. Comput. Sci. 144(1): 51-66 (2006) | |
| j32 | Chao Wang, Roderick Bloem, Gary D. Hachtel, Kavita Ravi, Fabio Somenzi: Compositional SCC Analysis for Language Emptiness. Formal Methods in System Design 28(1): 5-36 (2006) | |
| j31 | Roderick Bloem, Harold N. Gabow, Fabio Somenzi: An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps. Formal Methods in System Design 28(1): 37-56 (2006) | |
| j30 | Chao Wang, Bing Li, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi: Improving Ariadne's Bundle by Following Multiple Threads in Abstraction Refinement. IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2297-2316 (2006) | |
| c93 | Kuntal Nanshi, Fabio Somenzi: Guiding simulation with increasingly refined abstract traces. DAC 2006: 737-742 | |
| c92 | Mohammad Awedh, Fabio Somenzi: Automatic invariant strengthening to prove properties in bounded model checking. DAC 2006: 1073-1076 | |
| c91 | HoonSang Jin, Fabio Somenzi: Strong conflict analysis for propositional satisfiability. DATE 2006: 818-823 | |
| c90 | ||
| c89 | David Ward, Fabio Somenzi: Decomposing image computation for symbolic reachability analysis using control flow information. ICCAD 2006: 779-785 | |
| c88 | Bing Li, Fabio Somenzi: Efficient Abstraction Refinement in Interpolation-Based Unbounded Model Checking. TACAS 2006: 227-241 | |
| 2005 | ||
| j29 | HoonSang Jin, Fabio Somenzi: An Incremental Algorithm to Check Satisfiability for Bounded Model Checking. Electr. Notes Theor. Comput. Sci. 119(2): 51-65 (2005) | |
| j28 | ||
| c87 | David Ward, Fabio Somenzi: Automatic Generation of Hints for Symbolic Traversal. CHARME 2005: 207-221 | |
| c86 | HoonSang Jin, Fabio Somenzi: Prime clauses for fast enumeration of satisfying assignments to boolean circuits. DAC 2005: 750-753 | |
| c85 | HoonSang Jin, HyoJung Han, Fabio Somenzi: Efficient Conflict Analysis for Finding All Satisfying Assignments of a Boolean Circuit. TACAS 2005: 287-300 | |
| 2004 | ||
| j27 | HoonSang Jin, Kavita Ravi, Fabio Somenzi: Fate and free will in error traces. STTT 6(2): 102-116 (2004) | |
| c84 | Mohammad Awedh, Fabio Somenzi: Proving More Properties with Bounded Model Checking. CAV 2004: 96-108 | |
| c83 | HoonSang Jin, Mohammad Awedh, Fabio Somenzi: CirCUs: A Satisfiability Solver Geared towards Bounded Model Checking. CAV 2004: 519-522 | |
| c82 | Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi: Refining the SAT decision ordering for bounded model checking. DAC 2004: 535-538 | |
| c81 | Mohammad Awedh, Fabio Somenzi: Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States. FMCAD 2004: 230-244 | |
| c80 | ||
| c79 | Chao Wang, Gary D. Hachtel, Fabio Somenzi: Fine-Grain Abstraction and Sequential Don't Cares for Large Scale Model Checking. ICCD 2004: 112-118 | |
| c78 | ||
| c77 | HoonSang Jin, Fabio Somenzi: CirCUs: A Hybrid Satisfiability Solver. SAT (Selected Papers 2004: 211-223 | |
| c76 | ||
| 2003 | ||
| j26 | Bing Li, Chao Wang, Fabio Somenzi: A satisfiability-based approach to abstraction refinement in model checking. Electr. Notes Theor. Comput. Sci. 89(4): 608-622 (2003) | |
| c75 | ||
| c74 | Sankar Gurumurthy, Orna Kupferman, Fabio Somenzi, Moshe Y. Vardi: On Complementing Nondeterministic Büchi Automata. CHARME 2003: 96-110 | |
| c73 | Nikhil Jayakumar, Mitra Purandare, Fabio Somenzi: Dos and don'ts of CTL state coverage estimation. DAC 2003: 292-295 | |
| c72 | Rajesh K. Gupta, Shishpal Rawat, Sandeep K. Shukla, Brian Bailey, Daniel K. Beece, Masahiro Fujita, Carl Pixley, John O'Leary, Fabio Somenzi: Formal verification - prove it or pitch it. DAC 2003: 710-711 | |
| c71 | Chao Wang, Gary D. Hachtel, Fabio Somenzi: The Compositional Far Side of Image Computation. ICCAD 2003: 334-341 | |
| c70 | Chao Wang, Bing Li, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi: Improving Ariadneýs Bundle by Following Multiple Threads in Abstraction Refinement. ICCAD 2003: 408-415 | |
| e1 | Warren A. Hunt Jr., Fabio Somenzi (Eds.): Computer Aided Verification, 15th International Conference, CAV 2003, Boulder, CO, USA, July 8-12, 2003, Proceedings. Lecture Notes in Computer Science 2725, Springer 2003, isbn 3-540-40524-0 | |
| 2002 | ||
| c69 | ||
| c68 | ||
| c67 | Fabio Somenzi, Kavita Ravi, Roderick Bloem: Analysis of Symbolic SCC Hull Algorithms. FMCAD 2002: 88-105 | |
| c66 | HoonSang Jin, Andreas Kuehlmann, Fabio Somenzi: Fine-Grain Conjunction Scheduling for Symbolic Reachability Analysis. TACAS 2002: 312-326 | |
| c65 | ||
| 2001 | ||
| j25 | ||
| j24 | Rolf Drechsler, Wolfgang Günther, Fabio Somenzi: Using lower bounds during dynamic BDD minimization. IEEE Trans. on CAD of Integrated Circuits and Systems 20(1): 51-57 (2001) | |
| c64 | Chao Wang, Roderick Bloem, Gary D. Hachtel, Kavita Ravi, Fabio Somenzi: Divide and Compose: SCC Refinement for Language Emptiness. CONCUR 2001: 456-471 | |
| 2000 | ||
| j23 | Christoph Meinel, Fabio Somenzi, Thorsten Theobald: Linear sifting of decision diagrams and its application insynthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 19(5): 521-533 (2000) | |
| j22 | Melvin A. Breuer, Majid Sarrafzadeh, Fabio Somenzi: Fundamental CAD algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1449-1475 (2000) | |
| c63 | ||
| c62 | In-Ho Moon, James H. Kukula, Kavita Ravi, Fabio Somenzi: To split or to conjoin: the question in image computation. DAC 2000: 23-28 | |
| c61 | Roderick Bloem, Kavita Ravi, Fabio Somenzi: Symbolic guided search for CTL model checking. DAC 2000: 29-34 | |
| c60 | Gianpiero Cabodi, Stefano Quer, Fabio Somenzi: Optimizing sequential verification by retiming transformations. DAC 2000: 601-606 | |
| c59 | Balakrishna Kumthekar, Fabio Somenzi: Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs. DATE 2000: 202-207 | |
| c58 | Roderick Bloem, Harold N. Gabow, Fabio Somenzi: An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps. FMCAD 2000: 37-54 | |
| c57 | In-Ho Moon, Gary D. Hachtel, Fabio Somenzi: Border-Block Triangular Form and Conjunction Schedule in Image Computation. FMCAD 2000: 73-90 | |
| c56 | Kavita Ravi, Roderick Bloem, Fabio Somenzi: A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles. FMCAD 2000: 143-160 | |
| 1999 | ||
| j21 | ||
| c55 | Roderick Bloem, Kavita Ravi, Fabio Somenzi: Efficient Decision Procedures for Model Checking of Linear Time Logic Properties. CAV 1999: 222-235 | |
| c54 | ||
| c53 | Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton: Using Combinational Verification for Sequential Circuits. DATE 1999: 138-144 | |
| c52 | In-Ho Moon, James H. Kukula, Thomas R. Shiple, Fabio Somenzi: Least fixpoint approximations for reachability analysis. ICCAD 1999: 41-44 | |
| c51 | Hiroyuki Higuchi, Fabio Somenzi: Lazy group sifting for efficient symbolic state traversal of FSMs. ICCAD 1999: 45-49 | |
| c50 | ||
| 1998 | ||
| j20 | Enrico Macii, Massoud Pedram, Fabio Somenzi: High-level power modeling, estimation, and optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1061-1079 (1998) | |
| c49 | Christoph Meinel, Fabio Somenzi, Thorsten Theobald: Function Decomposition and Synthesis Using Linear Sifting. ASP-DAC 1998: 81-86 | |
| c48 | Kavita Ravi, Kenneth L. McMillan, Thomas R. Shiple, Fabio Somenzi: Approximation and Decomposition of Binary Decision Diagrams. DAC 1998: 445-450 | |
| c47 | Balakrishna Kumthekar, Luca Benini, Enrico Macii, Fabio Somenzi: In-Place Power Optimization for LUT-Based FPGAs. DAC 1998: 718-721 | |
| c46 | Bwolen Yang, Randal E. Bryant, David R. O'Hallaron, Armin Biere, Olivier Coudert, Geert Janssen, Rajeev K. Ranjan, Fabio Somenzi: A Performance Study of BDD-Based Model Checking. FMCAD 1998: 255-289 | |
| c45 | Fabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi: Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. ICCAD 1998: 235-241 | |
| c44 | In-Ho Moon, Jae-Young Jang, Gary D. Hachtel, Fabio Somenzi, Jun Yuan, Carl Pixley: Approximate reachability don't cares for CTL model checking. ICCAD 1998: 351-358 | |
| c43 | Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton: On the optimization power of retiming and resynthesis transformations. ICCAD 1998: 402-407 | |
| 1997 | ||
| j19 | R. Iris Bahar, Erica A. Frohm, Charles M. Gaona, Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi: Algebraic Decision Diagrams and Their Applications. Formal Methods in System Design 10(2/3): 171-206 (1997) | |
| j18 | Gary D. Hachtel, Fabio Somenzi: A Symbolic Algorithms for Maximum Flow in 0-1 Networks. Formal Methods in System Design 10(2/3): 207-219 (1997) | |
| j17 | Shin-ichi Minato, Fabio Somenzi: Arithmetic Boolean Expression Manipulator Using BDDs. Formal Methods in System Design 10(2/3): 221-242 (1997) | |
| j16 | R. Iris Bahar, Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Fabio Somenzi: Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths. IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1101-1115 (1997) | |
| j15 | Enrico Macii, Bernard Plessier, Fabio Somenzi: Formal verification of digital systems by automatic reduction of data paths. IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1136-1156 (1997) | |
| c42 | Srilatha Manne, Dirk Grunwald, Fabio Somenzi: Remembrance of Things Past: Locality and Memory in BDDs. DAC 1997: 196-201 | |
| c41 | Christoph Meinel, Fabio Somenzi, Thorsten Theobald: Linear Sifting of Decision Diagrams. DAC 1997: 202-207 | |
| c40 | Enrico Macii, Massoud Pedram, Fabio Somenzi: High-Level Power Modeling, Estimation, and Optimization. DAC 1997: 504-511 | |
| c39 | Balakrishna Kumthekar, In-Ho Moon, Fabio Somenzi: A symbolic algorithm for low-power sequential synthesis. ISLPED 1997: 56-61 | |
| i2 | Christoph Meinel, Fabio Somenzi, Thorsten Theobald: Function Decomposition and Synthesis Using Linear Sifting. Universität Trier, Mathematik/Informatik, Forschungsbericht 97-14 (1997) | |
| 1996 | ||
| b1 | Gary D. Hachtel, Fabio Somenzi: Logic synthesis and verification algorithms. Kluwer 1996, isbn 978-0-7923-9746-5, pp. I-XXIX, 1-564 | |
| j14 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi: Automatic state space decomposition for approximate FSM traversal based on circuit analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1451-1464 (1996) | |
| j13 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Bernard Plessier, Fabio Somenzi: Algorithms for approximate FSM traversal based on state space decomposition. IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1465-1478 (1996) | |
| j12 | Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi: Markovian analysis of large finite state machines. IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1479-1493 (1996) | |
| c38 | Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa: VIS: A System for Verification and Synthesis. CAV 1996: 428-432 | |
| c37 | Kavita Ravi, Abelardo Pardo, Gary D. Hachtel, Fabio Somenzi: Modular Verification of Multipliers. FMCAD 1996: 49-63 | |
| c36 | Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa: VIS. FMCAD 1996: 248-256 | |
| c35 | Woohyuk Lee, Abelardo Pardo, Jae-Young Jang, Gary D. Hachtel, Fabio Somenzi: Tearing based automatic abstraction for CTL model checking. ICCAD 1996: 76-81 | |
| c34 | R. Iris Bahar, M. Burns, Gary D. Hachtel, Enrico Macii, H. Shin, Fabio Somenzi: Symbolic computation of logic implications for technology-dependent low-power synthesis. ISLPED 1996: 163-168 | |
| i1 | Christoph Meinel, Fabio Somenzi, Thorsten Theobald: Linear Sifting of Decision Diagrams. Universität Trier, Mathematik/Informatik, Forschungsbericht 96-42 (1996) | |
| 1995 | ||
| c33 | Srilatha Manne, Abelardo Pardo, R. Iris Bahar, Gary D. Hachtel, Fabio Somenzi, Enrico Macii, Massimo Poncino: Computing the Maximum Power Cycles of a Sequential Circuit. DAC 1995: 23-28 | |
| c32 | ||
| c31 | ||
| c30 | R. Iris Bahar, Fabio Somenzi: Boolean techniques for low power driven re-synthesis. ICCAD 1995: 428-432 | |
| c29 | Abelardo Pardo, R. Iris Bahar, Srilatha Manne, Peter Feldmann, Gary D. Hachtel, Fabio Somenzi: CMOS dynamic power estimation based on collapsible current source transistor modeling. ISLPD 1995: 111-116 | |
| 1994 | ||
| j11 | Bernard Plessier, Gary D. Hachtel, Fabio Somenzi: Extended BDDs: Trading off Canonicity for Structure in Verification Algorithms. Formal Methods in System Design 4(2): 167-185 (1994) | |
| j10 | June-Kyung Rho, Gary D. Hachtel, Fabio Somenzi, Reily M. Jacoby: Exact and heuristic algorithms for the minimization of incompletely specified state machines. IEEE Trans. on CAD of Integrated Circuits and Systems 13(2): 167-177 (1994) | |
| j9 | June-Kyung Rho, Fabio Somenzi: Don't care sequences and the optimization of interacting finite state machines. IEEE Trans. on CAD of Integrated Circuits and Systems 13(7): 865-874 (1994) | |
| c28 | Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi: Probabilistic Analysis of Large Finite State Machines. DAC 1994: 270-275 | |
| c27 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi: A State Space Decomposition Algorithm for Approximate FSM Traversal. EDAC-ETC-EUROASIC 1994: 137-141 | |
| c26 | Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi: Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine. EDAC-ETC-EUROASIC 1994: 214-218 | |
| c25 | R. Iris Bahar, Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Fabio Somenzi: Timing Analysis of Combinational Circuits using ADD's. EDAC-ETC-EUROASIC 1994: 625-629 | |
| c24 | Gary D. Hachtel, Mariano Hermida de la Rica, Abelardo Pardo, Massimo Poncino, Fabio Somenzi: Re-encoding sequential circuits to reduce power dissipation. ICCAD 1994: 70-73 | |
| c23 | R. Iris Bahar, Gary D. Hachtel, Enrico Macii, Fabio Somenzi: A symbolic method to reduce power consumption of circuits containing false paths. ICCAD 1994: 368-371 | |
| c22 | Shipra Panda, Fabio Somenzi, Bernard Plessier: Symmetry detection and dynamic variable ordering of decision diagrams. ICCAD 1994: 628-631 | |
| c21 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi: A Structural Approach to State Space Decomposition for Approximate Reachability Analysis. ICCD 1994: 236-239 | |
| 1993 | ||
| j8 | Hyunwoo Cho, Seh-Woong Jeong, Fabio Somenzi, Carl Pixley: Synchronizing sequences and symbolic traversal techniques in test generation. J. Electronic Testing 4(1): 19-31 (1993) | |
| j7 | Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi: Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration. IEEE Trans. on CAD of Integrated Circuits and Systems 12(7): 935-945 (1993) | |
| c20 | June-Kyung Rho, Fabio Somenzi: Automatic Generation of Network Invariants for the Verification of Iterative Sequential Systems. CAV 1993: 123-137 | |
| c19 | Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Bernard Plessier, Fabio Somenzi: Algorithms for Approximate FSM Traversal. DAC 1993: 25-30 | |
| c18 | June-Kyung Rho, Fabio Somenzi, Carl Pixley: Minimum Length Synchronizing Sequences of Finite State Machine. DAC 1993: 463-468 | |
| c17 | R. Iris Bahar, Erica A. Frohm, Charles M. Gaona, Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi: Algebraic decision diagrams and their applications. ICCAD 1993: 188-191 | |
| c16 | Gary D. Hachtel, Fabio Somenzi: A symbolic algorithm for maximum flow in 0-1 networks. ICCAD 1993: 403-406 | |
| 1992 | ||
| c15 | ||
| c14 | Enrico Macii, Bernard Plessier, Fabio Somenzi: Verification of systems containing counters. ICCAD 1992: 179-182 | |
| c13 | Seh-Woong Jeong, Fabio Somenzi: A new algorithm for the binate covering problem and its application to the minimization of Boolean relations. ICCAD 1992: 417-420 | |
| c12 | June-Kyung Rho, Fabio Somenzi: The Role of Prime Compatibles in the Minimization of Finite State Machines. ICCD 1992: 324-327 | |
| 1991 | ||
| j6 | Michele Favalli, Piero Olivo, Bruno Riccò, Fabio Somenzi: Fault simulation for general FCMOS ICs. J. Electronic Testing 2(2): 181-190 (1991) | |
| c11 | June-Kyung Rho, Gary D. Hachtel, Fabio Somenzi: Don't Care Sequences and the Optimization of Interacting Finite State Machines. ICCAD 1991: 418-421 | |
| c10 | Seh-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi: Extended BDD's: Trading off Canonicity for Structure in Verification Algorithms. ICCAD 1991: 464-467 | |
| c9 | Seon-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi: Variable Ordering and Selection for FSM Traversal. ICCAD 1991: 476-479 | |
| c8 | Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi: Redundancy Identification and Removal Based on Implicit State Enumeration. ICCD 1991: 77-80 | |
| c7 | Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi: Fast Sequential ATPG Based on Implicit State Enumeration. ITC 1991: 67-74 | |
| 1990 | ||
| c6 | M. Pipponzi, Fabio Somenzi: An iterative algorithm for the binate covering problem. EURO-DAC 1990: 208-211 | |
| c5 | ||
| c4 | Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi: ATPG Aspects of FSM Verification. ICCAD 1990: 134-137 | |
| 1988 | ||
| j5 | Silvano Gai, Pier Luca Montessoro, Fabio Somenzi: MOZART: a concurrent multilevel simulator. IEEE Trans. on CAD of Integrated Circuits and Systems 7(9): 1005-1016 (1988) | |
| c3 | Silvano Gai, Pier Luca Montessoro, Fabio Somenzi: The Performance of the Concurrent Fault Simulation Algorithms in MOZART. DAC 1988: 692-697 | |
| c2 | Gianpiero Cabodi, Silvano Gai, Marco Mezzalama, Paolo Luca Montessoro, Fabio Somenzi: Fault simulation in a multilevel environment: the MOZART approach. FTCS 1988: 128-133 | |
| 1987 | ||
| j4 | Silvano Gai, Fabio Somenzi, M. Spalla: Fast and Coherent Simulation with Zero Delay Elements. IEEE Trans. on CAD of Integrated Circuits and Systems 6(1): 85-93 (1987) | |
| j3 | Silvano Gai, Fabio Somenzi, Ernst Ulrich: Advances in Concurrent Multilevel Simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 6(6): 1006-1012 (1987) | |
| 1985 | ||
| j2 | Fabio Somenzi, Silvano Gai, Marco Mezzalama, Paolo Prinetto: Testing Strategy and Technique for Macro-Based Circuits. IEEE Trans. Computers 34(1): 85-90 (1985) | |
| 1984 | ||
| j1 | Fabio Somenzi, Silvano Gai, Marco Mezzalama, Paolo Prinetto: PART: Programmable Array Testing Based on a Partitioning Algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 3(2): 142-149 (1984) | |
| 1983 | ||
| c1 | Fabio Somenzi, Silvano Gai, Marco Mezzalama, Paolo Prinetto: A new integrated system for PLA testing and verification. DAC 1983: 57-63 | |
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