| 2010 | ||
|---|---|---|
| j1 | Jean-Luc Beuchat, Hiroshi Doi, Kaoru Fujita, Atsuo Inomata, Piseth Ith, Akira Kanaoka, Masayoshi Katouno, Masahiro Mambo, Eiji Okamoto, Takeshi Okamoto, Takaaki Shiga, Masaaki Shirase, Ryuji Soga, Tsuyoshi Takagi, Ananda Vithanage, Hiroyasu Yamamoto: FPGA and ASIC implementations of the etaT pairing in characteristic three. Computers & Electrical Engineering 36(1): 73-87 (2010) | |
| 2008 | ||
| i1 | Jean-Luc Beuchat, Hiroshi Doi, Kaoru Fujita, Atsuo Inomata, Piseth Ith, Akira Kanaoka, Masayoshi Katouno, Masahiro Mambo, Eiji Okamoto, Takeshi Okamoto, Takaaki Shiga, Masaaki Shirase, Ryuji Soga, Tsuyoshi Takagi, Ananda Vithanage, Hiroyasu Yamamoto: FPGA and ASIC Implementations of the etaT Pairing in Characteristic Three. IACR Cryptology ePrint Archive 2008: 280 (2008) | |
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