Tejpal Singh

List of publications from the DBLP Bibliography Server - FAQ
Other views: by type - by year (modern) - classic-C

Ask others: ACM DL/Guide -

	2012
j2		Reid J. Riedlinger, Ron Arnold, Larry Biro, William J. Bowhill, Jason Crop, Kevin Duda, Eric S. Fetzer, Olivier Franza, Tom Grutkowski, Casey Little, Charles Morganti, Gary Moyer, Ashley Munch, Mahalingam Nagarajan, Cheolmin Park, Christopher Poirier, Bill Repasky, Edi Roytman, Tejpal Singh, Matthew W. Stefaniw: A 32 nm, 3.1 Billion Transistor, 12 Wide Issue Itanium® Processor for Mission-Critical Servers. J. Solid-State Circuits 47(1): 177-193 (2012)
	2010
c1		Cheolmin Park, Roy Badeau, Larry Biro, Jonathan Chang, Tejpal Singh, Jim Vash, Bo Wang, Tom Wang: A 1.2 TB/s on-chip ring interconnect for 45nm 8-core enterprise Xeon® processor. ISSCC 2010: 180-181
	2007
j1		Tejpal Singh, Alexander Taubin: A Highly Scalable GALS Crossbar Using Token Ring Arbitration. IEEE Design & Test of Computers 24(5): 464-472 (2007)

Coauthor Index

Last update Wed May 22 17:07:20 2013 CET by the DBLP Team —

Data released under the ODC-BY 1.0 license — See also our legal information page