| 2013 | ||
|---|---|---|
| c4 | Kanupriya Bhardwaj, Sriram Narayan, Sergey Shumarayev, Thomas Lee: A 3.1mW phase-tunable quadrature-generation method for CEI 28G short-reach CDR in 28nm CMOS. ISSCC 2013: 412-413 | |
| 2012 | ||
| c3 | Weichi Ding, Mingde Pan, Wilson Wong, Daniel Chow, Mike Peng Li, Sergey Shumarayev: On-die instrumentation to solve challenges for 28nm, 28Gbps timing variability and stressing. ITC 2012: 1-7 | |
| 2009 | ||
| c2 | Mike P. Li, Sergey Shumarayev: Emerging standards at ∼10 Gbps for wireline communications and associated integrated circuit design and validation. CICC 2009: 105-112 | |
| 2002 | ||
| c1 | Michael Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh Patel, Bruce Pedersen, Jay Schleicher, Sergey Shumarayev: Interconnect enhancements for a high-speed PLD architecture. FPGA 2002: 3-10 | |
| 1 | Kanupriya Bhardwaj | |
| 2 | Vinson Chan | |
| 3 | Daniel Chow | |
| 4 | Weichi Ding | |
| 5 | Michael Hutton (Michael D. Hutton, Mike Hutton) | |
| 6 | Peter Kazarian | |
| 7 | Thomas Lee | |
| 8 | Mike P. Li (Mike Peng Li) | |
| 9 | Victor Maruri | |
| 10 | Sriram Narayan | |
| 11 | Tony Ngai | |
| 12 | Mingde Pan | |
| 13 | Jim Park | |
| 14 | Rakesh Patel | |
| 15 | Bruce Pedersen | |
| 16 | Jay Schleicher | |
| 17 | Wilson Wong |
Colors in the list of coauthors
Last update Fri May 24 10:36:17 2013 CET by the DBLP Team —
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