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Klaus Schneider
2010 – today
- 2013
[j14]Mike Gemünde, Jens Brandt, Klaus Schneider: Clock refinement in imperative synchronous languages. EURASIP J. Emb. Sys. 2013: 3 (2013)- [j13]Jens Brandt, Mike Gemunde, Klaus Schneider, Sandeep K. Shukla, Jean-Pierre Talpin: Embedding Polychrony into Synchrony. IEEE Trans. Software Eng. 39(7): 917-929 (2013)
- [c124]Andreas Morgenstern, Manuel Gesell, Klaus Schneider: Solving Games Using Incremental Induction. IFM 2013: 177-191
- [c123]Jean-Pierre Talpin, Jens Brandt, Mike Gemünde, Klaus Schneider, Sandeep K. Shukla: Constructive Polychronous Systems. LFCS 2013: 335-349
- [c122]Manuel Gesell, Klaus Schneider: An Interactive Verification Tool for Synchronous/Reactive Systems. MBMV 2013: 267-277
- [c121]Philipp M. Eittenberger, Klaus Schneider, Udo R. Krieger: Location-Aware Traffic Analysis of a Peer-to-Peer Streaming Application in a HSPA Network. PDP 2013: 444-448
- [c120]Manuel Gesell, Andreas Morgenstern, Klaus Schneider: Lifting Verification Results for Preemption Statements. SEFM 2013: 91-105
- 2012
- [c119]Daniel Baudisch, Jens Brandt, Klaus Schneider: Efficient Handling of Arrays in Dataflow Process Networks. HPCC-ICESS 2012: 1395-1402
- [c118]Andreas Morgenstern, Manuel Gesell, Klaus Schneider: An Asymptotically Correct Finite Path Semantics for LTL. LPAR 2012: 304-319
- [c117]Yu Bai, Jens Brandt, Klaus Schneider: Preservation of LTL properties in desynchronized systems. MEMOCODE 2012: 53-64
- [c116]Manuel Gesell, Klaus Schneider: Interactive verification of synchronous systems. MEMOCODE 2012: 75-84
- [c115]Manuel Gesell, Klaus Schneider: A hoare calculus for the verification of synchronous languages. PLPV 2012: 37-48
- [c114]Daniel Baudisch, Jens Brandt, Klaus Schneider: Out-Of-order execution of synchronous data-flow networks. ICSAMOS 2012: 168-175
- [e2]Jens Brandt, Klaus Schneider (Eds.): Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Kaiserslautern, Germany, March 5-7, 2012. Verlag Dr. Kovac 2012
- 2011
- [j12]Kerstin Bauer, Raffaella Gentilini, Klaus Schneider: A uniform approach to three-valued semantics for μ-calculus on abstractions of hybrid automata. STTT 13(3): 273-287 (2011)
- [c113]Yu Bai, Jens Brandt, Klaus Schneider: Data-Flow Analysis of Extended Finite State Machines. ACSD 2011: 163-172
- [c112]Jens Brandt, Mike Gemunde, Klaus Schneider, Sandeep K. Shukla, Jean-Pierre Talpin: Integrating system descriptions by clocked guarded actions. FDL 2011: 1-8
- [c111]Mike Gemunde, Jens Brandt, Klaus Schneider: Schizophrenia and causality in the context of refined clocks. FDL 2011: 1-8
- [c110]Mike Gemünde, Jens Brandt, Klaus Schneider: Causality analysis of synchronous programs with refined clocks. HLDVT 2011: 25-32
- [c109]
- [c108]Karl Heckemann, Manuel Gesell, Thomas Pfister, Karsten Berns, Klaus Schneider, Mario Trapp: Safe Automotive Software. KES (4) 2011: 167-176
- [c107]Andreas Morgenstern, Klaus Schneider: Synthesis of Parallel Sorting Networks using SAT Solvers. MBMV 2011: 71-80
- [c106]
- [c105]Daniel Baudisch, Jens Brandt, Klaus Schneider: Translating Synchronous Systems to Data-Flow Process Networks. PDCAT 2011: 354-361
- [c104]Yu Bai, Jens Brandt, Klaus Schneider: SMT-based optimization for synchronous programs. SCOPES 2011: 11-20
- [c103]
- [c102]
- 2010
- [c101]Johannes Karl Eberharter, Klaus Schneider: Control for Synchronizing Multi-crane Lifts. CCA 2010: 1301-1306
- [c100]Kerstin Bauer, Klaus Schneider: Predicting Events for the Simulation of Hybrid Systems. CIT 2010: 1833-1840
- [c99]Mike Gemunde, Jens Brandt, Klaus Schneider: A Formal Semantics of Clock Refinement in Imperative Synchronous Languages. ACSD 2010: 157-168
- [c98]Jens Brandt, Klaus Schneider, Sumit Ahuja, Sandeep K. Shukla: The Model Checking View to Clock Gating and Operand Isolation. ACSD 2010: 181-190
- [c97]Daniel Baudisch, Jens Brandt, Klaus Schneider: Multithreaded code from synchronous programs: Extracting independent threads for OpenMP. DATE 2010: 949-952
- [c96]Kerstin Bauer, Klaus Schneider: From synchronous programs to symbolic representations of hybrid systems. HSCC 2010: 41-50
- [c95]Daniel Baudisch, Jens Brandt, Klaus Schneider: Dependency-Driven Distribution of Synchronous Programs. DIPES/BICC 2010: 169-180
- [c94]Jens Brandt, Klaus Schneider, Sandeep K. Shukla: Translating concurrent action oriented specifications to synchronous guarded actions. LCTES 2010: 47-56
- [c93]Daniel Baudisch, Jens Brandt, Klaus Schneider: Multithreaded Code from Synchronous Programs: Generating Software Pipelines for OpenMP. MBMV 2010: 11-20
- [c92]Jens Brandt, Mike Gemünde, Klaus Schneider: From Synchronous Guarded Actions to SystemC. MBMV 2010: 187-196
- [c91]Klaus Schneider, Barbara Jobstmann, Luca P. Carloni, Jens Brandt: Message from the chairs. MEMOCODE 2010: 1-3
- [c90]Mike Gemunde, Jens Brandt, Klaus Schneider: Compilation of imperative synchronous programs with refined clocks. MEMOCODE 2010: 209-218
- [c89]Andreas Morgenstern, Klaus Schneider: Exploiting the Temporal Logic Hierarchy and the Non-Confluence Property for Efficient LTL Synthesis. GANDALF 2010: 89-102
2000 – 2009
- 2009
- [c88]Jörg Neupert, Tobias Heinze, Oliver Sawodny, Klaus Schneider: Observer design for boom cranes with double-pendulum effect. CCA/ISIC 2009: 1545-1550
- [c87]Jens Brandt, Mike Gemunde, Klaus Schneider: Desynchronizing Synchronous Programs by Modes. ACSD 2009: 32-41
- [c86]Daniel Baudisch, Manuel Gesell, Klaus Schneider: Online Exercise System - A Web-based Tool for Administration and Automatic Correction of Exercises. CSEDU (1) 2009: 104-110
- [c85]Eric Vecchié, Jean-Pierre Talpin, Klaus Schneider: Separate compilation and execution of imperative synchronous modules. DATE 2009: 1580-1583
- [c84]Jens Brandt, Klaus Schneider, Adrian Willenbücher: Using IP Cores in Synchronous Languages. MBMV 2009: 97-106
- [c83]Jens Brandt, Klaus Schneider: Static data-flow analysis of synchronous programs. MEMOCODE 2009: 161-170
- [c82]
- [c81]Kerstin Bauer, Raffaella Gentilini, Klaus Schneider: Property Driven Three-Valued Model Checking on Hybrid Automata. WoLLIC 2009: 218-229
- 2008
- [j11]Eckhard Arnold, Jörg Neupert, Oliver Sawodny, Klaus Schneider: Modell-prädiktive Trajektoriengenerierung für flachheitsbasierte Folgeregelungen am Beispiel eines Hafenmobilkrans (Model-predictive Trajectory Generation for Flatness-based Nonlinear Tracking Control with Application to Boom Cranes). Automatisierungstechnik 56(8): 395-405 (2008)
- [j10]
- [j9]Kerstin Bauer, Raffaella Gentilini, Klaus Schneider: Approximated Reachability on Hybrid Automata: Falsification meets Certification. Electr. Notes Theor. Comput. Sci. 223: 47-60 (2008)
- [c80]Klaus Schneider, Jens Brandt: Performing causality analysis by bounded model checking. ACSD 2008: 78-87
- [c79]Kerstin Bauer, Raffaella Gentilini, Klaus Schneider: A Uniform Approach to Three-Valued Semantics for µ-Calculus on Abstractions of Hybrid Automata. Haifa Verification Conference 2008: 38-52
- [c78]Andreas Morgenstern, Klaus Schneider, Sven Lamberti: Generating Deterministic $\omega$-Automata for most LTL Formulas by the Breakpoint Construction. MBMV 2008: 119-128
- [c77]Jens Brandt, Klaus Schneider, Adrian Willenbücher: Hardware Acceleration for Model Checking. MBMV 2008: 179-187
- [c76]
- [c75]Andreas Morgenstern, Klaus Schneider: From LTL to Symbolically Represented Deterministic Automata. VMCAI 2008: 279-293
- 2007
- [j8]Tobias Schüle, Klaus Schneider: Bounded model checking of infinite state systems. Formal Methods in System Design 30(1): 51-81 (2007)
- [c74]
- [c73]Raffaella Gentilini, Klaus Schneider, Alexander Dreyer: Three-valued automated reasoning on analog properties. ACM Great Lakes Symposium on VLSI 2007: 485-488
- [c72]Martin Proetzsch, Karsten Berns, Tobias Schuele, Klaus Schneider: Formal verification of safety behaviours of the outdoor robot ravon. ICINCO-RA (1) 2007: 157-164
- [c71]Raffaella Gentilini, Klaus Schneider, B. Mishra: Successive Abstractions of Hybrid Automata for Monotonic CTL Model Checking. LFCS 2007: 224-240
- [c70]Raffaella Gentilini, Klaus Schneider, Alexander Dreyer: Combining Interval Arithmetic and Three-Valued Temporal Logics for the Verification of Analog Systems. MBMV 2007: 121-130
- [e1]Klaus Schneider, Jens Brandt (Eds.): Theorem Proving in Higher Order Logics, 20th International Conference, TPHOLs 2007, Kaiserslautern, Germany, September 10-13, 2007, Proceedings. Lecture Notes in Computer Science 4732, Springer 2007, ISBN 978-3-540-74590-7
- 2006
- [j7]Klaus Schneider, Jens Brandt, Tobias Schüle: A Verified Compiler for Synchronous Programs with Local Declarations. Electr. Notes Theor. Comput. Sci. 153(4): 71-97 (2006)
- [c69]
- [c68]Thomas Tuerk, Klaus Schneider, Mike Gordon: Model Checking PSL Using HOL and SMV. Haifa Verification Conference 2006: 1-15
- [c67]Tobias Schüle, Klaus Schneider: Verification of Data Paths Using Unbounded Integers: Automata Strike Back. Haifa Verification Conference 2006: 65-80
- [c66]Klaus Schneider, Jens Brandt, Eric Vecchié: Modular Compilation of Synchronous Programs. DIPES 2006: 75-84
- [c65]Klaus Schneider, Tobias Schüle: A Framework for Verifying and Implementing Embedded Systems. MBMV 2006: 242-247
- [c64]Klaus Schneider, Jens Brandt, Eric Vecchié: Efficient code generation from synchronous programs. MEMOCODE 2006: 165-174
- 2005
- [j6]Roberto Ziller, Klaus Schneider: Combining supervisor synthesis and model checking. ACM Trans. Embedded Comput. Syst. 4(2): 331-362 (2005)
- [c63]Klaus Schneider, Jens Brandt, Tobias Schüle, Thomas Tuerk: Maximal Causality Analysis. ACSD 2005: 106-115
- [c62]Jens Brandt, Klaus Schneider: Dependable Polygon-Processing Algorithms for Safety-Critical Embedded Systems. EUC 2005: 405-417
- [c61]Andreas Morgenstern, Klaus Schneider: A unified model checking framework for the supervisor synthesis problem. GALOP 2005: 140-156
- [c60]Jens Brandt, Klaus Schneider: Using Three-Valued Logic to Specify and Verify Algorithms of Computational Geometry. ICFEM 2005: 405-420
- [c59]Andreas Morgenstern, Klaus Schneider: Synthesizing deterministic controllers in supervisory control. ICINCO 2005: 24-31
- [c58]Tobias Schüle, Klaus Schneider: Three-valued logic in bounded model checking. MEMOCODE 2005: 177-186
- [c57]
- 2004
- [c56]Klaus Schneider, Jens Brandt, Tobias Schüle: Causality analysis of synchronous programs with delayed actions. CASES 2004: 179-189
- [c55]Tobias Schüle, Klaus Schneider: Abstraction of assembler programs for symbolic worst case execution time analysis. DAC 2004: 107-112
- [c54]Tobias Schüle, Klaus Schneider: Global vs. Local Model Checking of Infinite State Systems. MBMV 2004: 54-64
- [c53]Tobias Schüle, Klaus Schneider: Bounded model checking of infinite state systems: exploiting the automata hierarchy. MEMOCODE 2004: 17-26
- [c52]Tobias Schüle, Klaus Schneider: Global vs. Local Model Checking: A Comparison of Verification Techniques for Infinite State Systems. SEFM 2004: 67-76
- 2003
- [c51]George Logothetis, Klaus Schneider: Exact High Level WCET Analysis of Synchronous Programs by Symbolic State Space Exploration. DATE 2003: 10196-10203
- [c50]George Logothetis, Klaus Schneider, C. Metzler: Exact Low-Level Runtime Analysis of Synchronous Programs for Formal Verification of Real-Time Systems. FDL 2003: 385-405
- [c49]Oliver Sawodny, Alexander Hildebrandt, Klaus Schneider: Control design for the rotation of crane loads for boom cranes. ICRA 2003: 2182-2187
- [c48]Roberto Ziller, Klaus Schneider: A $\mu$-Calculus Approach to Supervisor Synthesis. MBMV 2003: 132-143
- [c47]Tobias Schüle, Klaus Schneider: Exact Runtime Analysis Using Automata-Based Symbolic Simulation. MEMOCODE 2003: 153-162
- [c46]Roberto Ziller, Klaus Schneider: A Generalised Approach to Supervisor Synthesis. MEMOCODE 2003: 217-226
- [c45]George Logothetis, Klaus Schneider, C. Metzler: Generating Formal Models for Real-Time Verification by Exact Low-Level Runtime Analysis of Synchronous Programs. RTSS 2003: 256-264
- [c44]George Logothetis, Klaus Schneider, C. Metzler: Runtime Analysis of Synchronous Programs for Low-Level Real-Time Verification. SBCCI 2003: 211-216
- 2002
- [j5]Michael Baldamus, Klaus Schneider: The BDD Space Complexity of Different Forms of Concurrency. Fundam. Inform. 50(2): 111-133 (2002)
- [c43]George Logothetis, Klaus Schneider: Extending Synchronous Languages for Generating Abstract Real-Time Models. DATE 2002: 795-802
- [c42]Tobias Schuele, Klaus Schneider: Symbolic Model Checking by Automata Based Set Representation. MBMV 2002: 229-238
- [c41]
- 2001
- [j4]Michael Baldamus, Klaus Schneider, Michael Wenz, Roberto Ziller: Can American Checkers be Solved by Means of Symbolic Model Checking? Electr. Notes Theor. Comput. Sci. 43: 15-33 (2001)
- [c40]Klaus Schneider: Embedding Imperative Synchronous Languages in Interactive Theorem Provers. ACSD 2001: 143-
- [c39]Michael Baldamus, Klaus Schneider: The BDD Space Complexity of Different Forms of Concurrency. ACSD 2001: 231-
- [c38]George Logothetis, Klaus Schneider: A New Approach to the Specification and Verification of Real-Time Systems. ECRTS 2001: 171-
- [c37]Klaus Schneider: Improving Automata Generation for Linear Temporal Logic by Considering the Automaton Hierarchy. LPAR 2001: 39-54
- [c36]George Logothetis, Klaus Schneider: Symbolic Model Checking of Real-Time Systems. TIME 2001: 214-223
- 2000
- [c35]George Logothetis, Klaus Schneider: Abstraction from Counters: An Application on Real-Time Systems. DATE 2000: 486-493
- [c34]
1990 – 1999
- 1999
- [c33]
- [c32]Klaus Schneider, Michaela Huhn, George Logothetis: Validation of Object-Oriented Concurrent Designs by Model Checking. CHARME 1999: 360-364
- [c31]Michaela Huhn, Klaus Schneider, Thomas Kropf, George Logothetis: Verifying Imprecisely Working Arithmetic Circuits. DATE 1999: 65-
- [c30]Klaus Schneider, Viktor K. Sabelfeld: Introducing Mutual Exclusion in Esterel. Ershov Memorial Conference 1999: 445-459
- [c29]Thomas Stauner, Klaus Schneider, Michaela Huhn: Translating a Visual Description Technique to a Synchronous Language: From DiChartsto PURR. FBT 1999: 223-232
- [c28]Klaus Schneider, George Logothetis: Abstraction of Systems with Counters for Symbolic Model Checking. MBMV 1999: 31-40
- [c27]Klaus Schneider, Dirk W. Hoffmann: A HOL Conversion for Translating Linear Time Temporal Logic to omega-Automata. TPHOLs 1999: 255-272
- 1998
- [c26]Ralf Reetz, Klaus Schneider, Thomas Kropf: Formal Specification in VHDL for Hardware Verification. DATE 1998: 257-263
- [c25]
- [c24]Klaus Schneider, Michaela Huhn: Comparing Model Checking and Term Rewriting for the Verification of an Embedded System. DIPES 1998: 129-138
- [c23]Thomas Kropf, Jürgen Ruf, Klaus Schneider, Markus Wild: A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems. MBMV 1998: 11-20
- [c22]Winfried Grünewald, Klaus Schneider: Modeling and Verifying Abstract Multithreaded Systems. MBMV 1998: 85-94
- [c21]Ingo Schreiber, Jens Schönherr, Eva Fordran, Klaus Schneider, Bernd Straube: Kontrollfluss-Verifikation von Algorithmen mittels Modellprüfung. MBMV 1998: 114-123
- 1997
- [c20]
- 1996
- [b1]Klaus Schneider: Ein einheitlicher Ansatz zur Unterstützung von Abstraktionsmechanismen der Hardware-Verifikation. DISKI 116, Infix 1996, ISBN 978-3-89601-116-9, pp. 1-229
- [c19]Klaus Schneider, Thomas Kropf: A Unified Approach for Combining Different Formalisms for Hardware Verification. FMCAD 1996: 202-217
- 1995
- [c18]Ramayya Kumar, Thomas Kropf, Klaus Schneider: Formal synthesis of circuits with a simple handshake protocol. VLSI Design 1995: 255-259
- 1994
- [j3]Klaus Schneider, Ramayya Kumar, Thomas Kropf: Accelerating Tableaux Proofs Using Compact Representations. Formal Methods in System Design 5(1/2): 145-176 (1994)
- [c17]Klaus Schneider, Thomas Kropf, Ramayya Kumar: Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path. EDAC-ETC-EUROASIC 1994: 648-652
- [c16]Thomas Kropf, Klaus Schneider, Ramayya Kumar: A Formal Framework for High Level Synthesis. TPCD 1994: 223-238
- [c15]Klaus Schneider, Ramayya Kumar, Thomas Kropf: Automating Verification by Functional Abstraction at the System Level. TPHOLs 1994: 391-406
- 1993
- [j2]Ramayya Kumar, Klaus Schneider, Thomas Kropf: Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment. Formal Methods in System Design 2(2): 165-223 (1993)
- [c14]Thomas Kropf, Ramayya Kumar, Klaus Schneider: Embedding Hardware Verification Within a Commercial Design Framework. CHARME 1993: 242-257
- [c13]Klaus Schneider, Ramayya Kumar, Thomas Kropf: Hardware-Verification using First Order BDDs. CHDL 1993: 45-62
- [c12]Dirk Eisenbiegler, Klaus Schneider, Ramayya Kumar: A Functional Approach for Formalizing Regular Hardware Structures. HUG 1993: 101-114
- [c11]Klaus Schneider, Ramayya Kumar, Thomas Kropf: Alternative Proof Procedures for Finite-State Machines in Higher-Order Logic. HUG 1993: 213-226
- [c10]Klaus Schneider, Ramayya Kumar, Thomas Kropf: Eliminating Higher-Order Quantifiers to Obtain Decision Procedures for Hardware Verification. HUG 1993: 385-398
- 1992
- [c9]
- [c8]Klaus Schneider, Ramayya Kumar, Thomas Kropf: Efficient Representation and Computation of Tableau Proofs. TPHOLs 1992: 39-57
- [c7]Klaus Schneider, Ramayya Kumar, Thomas Kropf: Modelling Generic Hardware Structures by Abstract Datatypes. TPHOLs 1992: 165-175
- 1991
- [c6]Klaus Schneider, Ramayya Kumar, Thomas Kropf: Automating Most Parts of Hardware Proofs in HOL. CAV 1991: 365-375
- [c5]Ramayya Kumar, Thomas Kropf, Klaus Schneider: Integrating a First-Order Automatic Prover in the HOL Environment. TPHOLs 1991: 170-176
- [c4]Ramayya Kumar, Thomas Kropf, Klaus Schneider: First Steps Towards Automating Hardware Proofs in HOL. TPHOLs 1991: 190-193
- [c3]Klaus Schneider, Ramayya Kumar, Thomas Kropf: Structurein Hardware Proofs: Fist Steps Towards Automation in a Higher-Order Environment. VLSI 1991: 81-90
1980 – 1989
- 1981
- [c2]Klaus Schneider: Ein System-Diagnoseprozessor für zentralen und dezentralen Einsatz in Prozeßrechner-Systemen. Fachtagung Prozessrechner 1981: 186-195
1970 – 1979
- 1977
- [c1]Klaus Pasemann, Klaus Schneider: Ein CAD-Anwendungssystem für Autoelektrik. CAD-Fachgespräch 1977: 197-206
- 1976
- [j1]Klaus Pasemann, Klaus Schneider, Ernst Vöge: Das grafische Ausgabesystem am VW-Prozeß-Leit-System (PLS). Elektronische Rechenanlagen 18(5): 241-245 (1976)
Coauthor Index
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last updated on 2013-10-02 11:12 CEST by the dblp team