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Semantic ScholarJ. Ramanujam
Jagannathan Ramanujam
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- affiliation: Louisiana State University, Baton Rouge, LA, USA
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- 2017
[i5]Zahra Khatami, Hartmut Kaiser, J. Ramanujam:
Redesigning OP2 Compiler to Use HPX Runtime Asynchronous Techniques. CoRR abs/1703.09264 (2017)- 2016
- [j50]Yun Ding, Ye Fang, Juana Moreno, J. Ramanujam, Mark Jarrell, Michal Brylinski:
Assessing the similarity of ligand binding conformations with the Contact Mode Score. Computational Biology and Chemistry 64: 403-413 (2016) - [c112]Zahra Khatami, Hartmut Kaiser, J. Ramanujam:
Using HPX and OP2 for Improving Parallel Scaling Performance of Unstructured Grid Applications. ICPP Workshops 2016: 190-199 - [c111]Changwan Hong, Wenlei Bao, Albert Cohen, Sriram Krishnamoorthy, Louis-Noël Pouchet, Fabrice Rastello, J. Ramanujam, P. Sadayappan:
Effective padding of multidimensional arrays to avoid cache conflict misses. PLDI 2016: 129-144 - [c110]Zahra Khatami, Hartmut Kaiser, Patricia Grubel, Adrian Serio, J. Ramanujam:
A Massively Parallel Distributed N-body Application Implemented with HPX. ScalA@SC 2016: 57-64 - 2015
- [j49]Yun Ding, Ye Fang, Wei P. Feinstein, Jagannathan Ramanujam, David M. Koppelman, Juana Moreno, Michal Brylinski, Mark Jarrell:
GeauxDock: A novel approach for mixed-resolution ligand docking using a descriptor-based force field. Journal of Computational Chemistry 36(27): 2013-2026 (2015) - [j48]Keshav Pingali, J. Ramanujam, P. Sadayappan:
Introduction to the Special Issue on PPoPP'12. TOPC 1(2): 9:1-9:2 (2015) - [c109]Tobias Grosser, Jagannathan Ramanujam, Louis-Noël Pouchet, P. Sadayappan, Sebastian Pop:
Optimistic Delinearization of Parametrically Sized Arrays. ICS 2015: 351-360 - [c108]Venmugil Elango, Fabrice Rastello, Louis-Noël Pouchet, J. Ramanujam, P. Sadayappan:
On Characterizing the Data Access Complexity of Programs. POPL 2015: 567-580 - [c107]Mahesh Ravishankar, Roshan Dathathri, Venmugil Elango, Louis-Noël Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Distributed memory code generation for mixed Irregular/Regular computations. PPOPP 2015: 65-75 - [c106]Sameer AbuAsal, R. Tohid, J. Ramanujam:
Lost in heterogeneity: architectural selection based on code features. Co-HPC@SC 2015: 6:1-6:6 - [c105]Prashant Singh Rawat, Martin Kong, Thomas Henretty, Justin Holewinski, Kevin Stock, Louis-Noël Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan:
SDSLc: a multi-target domain-specific compiler for stencil computations. WOLFHPC@SC 2015: 6:1-6:10 - 2014
- [j47]Zhifeng Yun, Zhou Lei, Gabrielle Allen, Daniel S. Katz, Jagannathan Ramanujam:
DA-TC: a novel application execution model in multicluster systems. Cluster Computing 17(2): 371-387 (2014) - [i4]Naznin Fauzia, Venmugil Elango, Mahesh Ravishankar, J. Ramanujam, Fabrice Rastello, Atanas Rountev, Louis-Noël Pouchet, P. Sadayappan:
Beyond Reuse Distance Analysis: Dynamic Analysis for Characterization of Data Locality Potential. CoRR abs/1401.5024 (2014) - [i3]Venmugil Elango, Fabrice Rastello, Louis-Noël Pouchet, J. Ramanujam, P. Sadayappan:
On Characterizing the Data Movement Complexity of Computational DAGs for Parallel Execution. CoRR abs/1404.4767 (2014) - [i2]Fabio Luporini, Ana Lucia Varbanescu, Florian Rathgeber, Gheorghe-Teodor Bercea, J. Ramanujam, David A. Ham, Paul H. J. Kelly:
COFFEE: an Optimizing Compiler for Finite Element Local Assembly. CoRR abs/1407.0904 (2014) - [i1]Venmugil Elango, Fabrice Rastello, Louis-Noël Pouchet, J. Ramanujam, P. Sadayappan:
On Characterizing the Data Access Complexity of Programs. CoRR abs/1411.2286 (2014) - [j46]Ye Fang, Sheng Feng, Ka-Ming Tam, Zhifeng Yun, Juana Moreno, Jagannathan Ramanujam, Mark Jarrell:
Parallel tempering simulation of the three-dimensional Edwards-Anderson model with compact asynchronous multispin coding on GPU. Computer Physics Communications 185(10): 2467-2478 (2014) - [j45]Sriram Krishnamoorthy, J. Ramanujam, P. Sadayappan:
Introduction to the JPDC Special Issue on Domain-Specific Languages and High-Level Frameworks for High-Performance Computing. J. Parallel Distrib. Comput. 74(12): 3175 (2014) - [j44]Fabio Luporini, Ana Lucia Varbanescu, Florian Rathgeber, Gheorghe-Teodor Bercea, J. Ramanujam, David A. Ham, Paul H. J. Kelly:
Cross-Loop Optimization of Arithmetic Intensity for Finite Element Local Assembly. TACO 11(4): 57:1-57:25 (2014) - [j43]Venmugil Elango, Naser Sedaghati, Fabrice Rastello, Louis-Noël Pouchet, J. Ramanujam, Radu Teodorescu, P. Sadayappan:
On Using the Roofline Model with Lower Bounds on Data Movement. TACO 11(4): 67:1-67:23 (2014) - [j42]Mahesh Ravishankar, John Eisenlohr, Louis-Noël Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Automatic parallelization of a class of irregular loops for distributed memory systems. TOPC 1(1): 7:1-7:37 (2014) - [c104]Michelle Mills Strout, Fabio Luporini, Christopher D. Krieger, Carlo Bertolli, Gheorghe-Teodor Bercea, Catherine Olschanowsky, J. Ramanujam, Paul H. J. Kelly:
Generalizing Run-Time Tiling with the Loop Chain Abstraction. IPDPS 2014: 1136-1145 - [c103]Kevin Stock, Martin Kong, Tobias Grosser, Louis-Noël Pouchet, Fabrice Rastello, J. Ramanujam, P. Sadayappan:
A framework for enhancing data reuse via associative reordering. PLDI 2014: 65-76 - [c102]Venmugil Elango, Fabrice Rastello, Louis-Noël Pouchet, J. Ramanujam, P. Sadayappan:
On characterizing the data movement complexity of computational DAGs for parallel execution. SPAA 2014: 296-306 - 2013
- [j41]Sanket Tavarageri, J. Ramanujam, P. Sadayappan:
Adaptive parallel tiled code generation and accelerated auto-tuning. IJHPCA 27(4): 412-425 (2013) - [j40]Naznin Fauzia, Venmugil Elango, Mahesh Ravishankar, J. Ramanujam, Fabrice Rastello, Atanas Rountev, Louis-Noël Pouchet, P. Sadayappan:
Beyond reuse distance analysis: Dynamic analysis for characterization of data locality potential. TACO 10(4): 53:1-53:29 (2013) - [c101]Tobias Grosser, Albert Cohen, Paul H. J. Kelly, J. Ramanujam, P. Sadayappan, Sven Verdoolaege:
Split tiling for GPUs: automatic parallelization using trapezoidal tiles. GPGPU@ASPLOS 2013: 24-31 - [c100]Thomas Henretty, Richard Veras, Franz Franchetti, Louis-Noël Pouchet, J. Ramanujam, P. Sadayappan:
A stencil compiler for short-vector SIMD architectures. ICS 2013: 13-24 - [c99]Athanasios Konstantinidis, Paul H. J. Kelly, J. Ramanujam, P. Sadayappan:
Parametric GPU Code Generation for Affine Loop Programs. LCPC 2013: 136-151 - 2012
- [j39]Hassan Salamy, J. Ramanujam:
Code Size Reduction for Array Intensive Applications on Digital Signal Processors. Journal of Circuits, Systems, and Computers 21(3) (2012) - [j38]Qingda Lu, Xiaoyang Gao, Sriram Krishnamoorthy, Gerald Baumgartner, J. Ramanujam, P. Sadayappan:
Empirical performance model-driven data layout optimization and library call selection for tensor contraction expressions. J. Parallel Distrib. Comput. 72(3): 338-352 (2012) - [j37]Hassan Salamy, J. Ramanujam:
An Effective Solution to Task Scheduling and Memory Partitioning for Multiprocessor System-on-Chip. IEEE Trans. on CAD of Integrated Circuits and Systems 31(5): 717-725 (2012) - [j36]Hassan Salamy, J. Ramanujam:
Storage Optimization through Offset Assignment with Variable Coalescing. ACM Trans. Embedded Comput. Syst. 11(S1): 16 (2012) - [j35]Hassan Salamy, J. Ramanujam:
An ILP solution to address code generation for embedded applications on digital signal processors. ACM Trans. Design Autom. Electr. Syst. 17(3): 28:1-28:23 (2012) - [c98]Jun Shirako, Kamal Sharma, Naznin Fauzia, Louis-Noël Pouchet, J. Ramanujam, P. Sadayappan, Vivek Sarkar:
Analytical Bounds for Optimal Tile Size Selection. CC 2012: 101-121 - [c97]Mahesh Ravishankar, John Eisenlohr, Louis-Noël Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Code generation for parallel execution of a class of irregular loops on distributed memory systems. SC 2012: 72 - [e2]J. Ramanujam, P. Sadayappan:
Proceedings of the 17th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2012, New Orleans, LA, USA, February 25-29, 2012. ACM 2012, ISBN 978-1-4503-1160-1 [contents] - 2011
- [c96]Thomas Henretty, Kevin Stock, Louis-Noël Pouchet, Franz Franchetti, J. Ramanujam, P. Sadayappan:
Data Layout Transformation for Stencil Computations on Short-Vector SIMD Architectures. CC 2011: 225-245 - [c95]Sanket Tavarageri, Louis-Noël Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Dynamic selection of tile sizes. HiPC 2011: 1-10 - [c94]Louis-Noël Pouchet, Uday Bondhugula, Cédric Bastoul, Albert Cohen, J. Ramanujam, P. Sadayappan, Nicolas Vasilache:
Loop transformations: convexity, pruning and optimization. POPL 2011: 549-562 - 2010
- [c93]Muthu Manikandan Baskaran, J. Ramanujam, P. Sadayappan:
Automatic C-to-CUDA Code Generation for Affine Programs. CC 2010: 244-263 - [c92]Muthu Manikandan Baskaran, Albert Hartono, Sanket Tavarageri, Thomas Henretty, J. Ramanujam, P. Sadayappan:
Parameterized tiling revisited. CGO 2010: 200-209 - [c91]Albert Hartono, Muthu Manikandan Baskaran, J. Ramanujam, Ponnuswamy Sadayappan:
DynTile: Parametric tiled loop generation for parallel execution on multicore processors. IPDPS 2010: 1-12 - [c90]Louis-Noël Pouchet, Uday Bondhugula, Cédric Bastoul, Albert Cohen, J. Ramanujam, P. Sadayappan:
Combined Iterative and Model-driven Optimization in an Automatic Parallelization Framework. SC 2010: 1-11
2000 – 2009
- 2009
- [c89]Qingda Lu, Christophe Alias, Uday Bondhugula, Thomas Henretty, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan, Yongjian Chen, Haibo Lin, Tin-fook Ngai:
Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors. PACT 2009: 348-357 - [c88]Zhifeng Yun, Zhou Lei, Gabrielle Allen, Daniel S. Katz, Tevfik Kosar, Shantenu Jha, Jagannathan Ramanujam:
An innovative application execution toolkit for multicluster grids. CLUSTER 2009: 1-4 - [c87]Hassan Salamy, J. Ramanujam:
A Framework for Task Scheduling and Memory Partitioning for Multi-Processor System-on-Chip. HiPEAC 2009: 263-277 - [c86]Albert Hartono, Muthu Manikandan Baskaran, Cédric Bastoul, Albert Cohen, Sriram Krishnamoorthy, Boyana Norris, J. Ramanujam, P. Sadayappan:
Parametric multi-level tiling of imperfectly nested loops. ICS 2009: 147-157 - [c85]Muthu Manikandan Baskaran, Nagavijayalakshmi Vydyanathan, Uday Bondhugula, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors. PPOPP 2009: 219-228 - [c84]Rajesh Sankaran, Brygg Ullmer, Jagannathan Ramanujam, Karun Kallakuri, Srikanth Jandhyala, Cornelius Toole, Christopher Laan:
Decoupling interaction hardware design using libraries of reusable electronics. Tangible and Embedded Interaction 2009: 331-337 - 2008
- [c83]Uday Bondhugula, Muthu Manikandan Baskaran, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model. CC 2008: 132-146 - [c82]Hassan Salamy, J. Ramanujam:
Optimal address register allocation for arrays in DSP applications. ESTImedia 2008: 67-72 - [c81]Hassan Salamy, J. Ramanujam:
Storage optimization through code size reduction for digital signal processors. ESTImedia 2008: 107-112 - [c80]Jinpyo Hong, J. Ramanujam:
Address Register Allocation in Digital Signal Processors. ICESS 2008: 331-337 - [c79]Jinpyo Hong, J. Ramanujam:
Scheduling DAGs for Fixed-point DSP Processors by Using Worm Partitions. ICESS 2008: 567-574 - [c78]Muthu Manikandan Baskaran, Uday Bondhugula, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan:
A compiler framework for optimization of affine loop nests for gpgpus. ICS 2008: 225-234 - [c77]Uday Bondhugula, Muthu Manikandan Baskaran, Albert Hartono, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Towards effective automatic parallelization for multicore systems. IPDPS 2008: 1-5 - [c76]Uday Bondhugula, Albert Hartono, J. Ramanujam, P. Sadayappan:
A practical automatic polyhedral parallelizer and locality optimizer. PLDI 2008: 101-113 - [c75]Muthu Manikandan Baskaran, Uday Bondhugula, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories. PPOPP 2008: 1-10 - 2007
- [j34]Xiaoyang Gao, Sriram Krishnamoorthy, Swarup Kumar Sahoo, Chi-Chung Lam, Gerald Baumgartner, J. Ramanujam, P. Sadayappan:
Efficient search-space pruning for integrated fusion and tiling transformations. Concurrency and Computation: Practice and Experience 19(18): 2425-2443 (2007) - [c74]
- [c73]Sriram Krishnamoorthy, Muthu Manikandan Baskaran, Uday Bondhugula, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Effective automatic parallelization of stencil computations. PLDI 2007: 235-244 - [c72]Uday Bondhugula, J. Ramanujam, P. Sadayappan:
Automatic mapping of nested loops to FPGAS. PPOPP 2007: 101-111 - [c71]Sai Pinnepalli, Jinpyo Hong, J. Ramanujam, Doris L. Carver:
Code Size Optimization for Embedded Processors using Commutative Transformations. RTCSA 2007: 409-416 - 2006
- [j33]Sandhya Krishnan, Sriram Krishnamoorthy, Gerald Baumgartner, Chi-Chung Lam, J. Ramanujam, P. Sadayappan, Venkatesh Choppella:
Efficient synthesis of out-of-core algorithms using a nonlinear optimization solver. J. Parallel Distrib. Comput. 66(5): 659-673 (2006) - [j32]Guilin Chen, Mahmut T. Kandemir, Mary Jane Irwin, J. Ramanujam:
Reducing code size through address register assignment. ACM Trans. Embedded Comput. Syst. 5(1): 225-258 (2006) - [j31]Mahmut T. Kandemir, J. Ramanujam, Ugur Sezer:
Improving the energy behavior of block buffering using compiler optimizations. ACM Trans. Design Autom. Electr. Syst. 11(1): 228-250 (2006) - [j30]J. Ramanujam, Jinpyo Hong, Mahmut T. Kandemir, Amit Narayan, A. Agarwal:
Estimating and reducing the memory requirements of signal processing codes for embedded systems. IEEE Trans. Signal Processing 54(1): 286-294 (2006) - [c70]Albert Hartono, Qingda Lu, Xiaoyang Gao, Sriram Krishnamoorthy, Marcel Nooijen, Gerald Baumgartner, David E. Bernholdt, Venkatesh Choppella, Russell M. Pitzer, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Identifying Cost-Effective Common Subexpressions to Reduce Operation Count in Tensor Contraction Evaluations. International Conference on Computational Science (1) 2006: 267-275 - [c69]A. Allam, J. Ramanujam, Gerald Baumgartner, P. Sadayappan:
Memory minimization for tensor contractions using integer linear programming. IPDPS 2006 - [c68]Hassan Salamy, J. Ramanujam:
An Effective Heuristic for Simple Offset Assignment with Variable Coalescing. LCPC 2006: 158-172 - [e1]Eduard Ayguadé, Gerald Baumgartner, J. Ramanujam, P. Sadayappan:
Languages and Compilers for Parallel Computing, 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers. Lecture Notes in Computer Science 4339, Springer 2006, ISBN 978-3-540-69329-1 [contents] - 2005
- [c67]Albert Hartono, Alexander Sibiryakov, Marcel Nooijen, Gerald Baumgartner, David E. Bernholdt, So Hirata, Chi-Chung Lam, Russell M. Pitzer, J. Ramanujam, P. Sadayappan:
Automated Operation Minimization of Tensor Contraction Expressions in Electronic Structure Calculations. International Conference on Computational Science (1) 2005: 155-164 - [c66]Xiaoyang Gao, Sriram Krishnamoorthy, Swarup Kumar Sahoo, Chi-Chung Lam, Gerald Baumgartner, J. Ramanujam, P. Sadayappan:
Efficient Search-Space Pruning for Integrated Fusion and Tiling Transformations. LCPC 2005: 215-229 - [c65]Xiaoyang Gao, Swarup Kumar Sahoo, Chi-Chung Lam, J. Ramanujam, Qingda Lu, Gerald Baumgartner, P. Sadayappan:
Performance modeling and optimization of parallel out-of-core tensor contractions. PPOPP 2005: 266-276 - 2004
- [j29]Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh:
A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 243-260 (2004) - [c64]Sandhya Krishnan, Sriram Krishnamoorthy, Gerald Baumgartner, Chi-Chung Lam, J. Ramanujam, P. Sadayappan, Venkatesh Choppella:
Efficient Synthesis of Out-of-Core Algorithms Using a Nonlinear Optimization Solver. IPDPS 2004 - [c63]Qingda Lu, Xiaoyang Gao, Sriram Krishnamoorthy, Gerald Baumgartner, J. Ramanujam, P. Sadayappan:
Empirical Performance-Model Driven Data Layout Optimization. LCPC 2004: 72-86 - 2003
- [j28]Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee:
Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework. IEEE Trans. Parallel Distrib. Syst. 14(4): 337-354 (2003) - [c62]Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, J. Ramanujam:
Address Register Assignment for Reducing Code Size. CC 2003: 273-289 - [c61]Sandhya Krishnan, Sriram Krishnamoorthy, Gerald Baumgartner, Daniel Cociorva, Chi-Chung Lam, P. Sadayappan, J. Ramanujam, David E. Bernholdt, Venkatesh Choppella:
Data Locality Optimization for Synthesis of Efficient Out-of-Core Algorithms. HiPC 2003: 406-417 - [c60]Daniel Cociorva, Xiaoyang Gao, Sandhya Krishnan, Gerald Baumgartner, Chi-Chung Lam, P. Sadayappan, J. Ramanujam:
Global Communication Optimization for Tensor Contraction Expressions under Memory Constraints. IPDPS 2003: 37 - [c59]Alina Bibireata, Sandhya Krishnan, Gerald Baumgartner, Daniel Cociorva, Chi-Chung Lam, P. Sadayappan, J. Ramanujam, David E. Bernholdt, Venkatesh Choppella:
Memory-Constrained Data Locality Optimization for Tensor Contractions. LCPC 2003: 93-108 - 2002
- [j27]Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam:
An I/O-Conscious Tiling Strategy for Disk-Resident Data Sets. The Journal of Supercomputing 21(3): 257-284 (2002) - [c58]Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary:
Exploiting shared scratch pad memory space in embedded multiprocessor systems. DAC 2002: 219-224 - [c57]Gerald Baumgartner, David E. Bernholdt, Daniel Cociorva, Chi-Chung Lam, J. Ramanujam, Robert J. Harrison, Marcel Nooijen, P. Sadayappan:
A Performance Optimization Framework for Compilation of Tensor Contraction Expressions into Parallel Programs. IPDPS 2002 - [c56]Daniel Cociorva, Gerald Baumgartner, Chi-Chung Lam, P. Sadayappan, J. Ramanujam:
Memory-Constrained Communication Minimization for a Class of Array Computations. LCPC 2002: 1-15 - [c55]Daniel Cociorva, Gerald Baumgartner, Chi-Chung Lam, P. Sadayappan, J. Ramanujam, Marcel Nooijen, David E. Bernholdt, Robert J. Harrison:
Space-Time Trade-Off Optimization for a Class of Electronic Structure Calculations. PLDI 2002: 177-186 - [c54]Gerald Baumgartner, David E. Bernholdt, Daniel Cociorva, Robert J. Harrison, So Hirata, Chi-Chung Lam, Marcel Nooijen, Russell M. Pitzer, J. Ramanujam, P. Sadayappan:
A high-level approach to synthesis of high-performance codes for quantum chemistry. SC 2002: 33:1-33:10 - [c53]J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahmut T. Kandemir:
A Heuristic for Clock Selection in High-Level Synthesis. VLSI Design 2002: 414-419 - [c52]J. Ramanujam, Satish Krishnamurthy, Jinpyo Hong, Mahmut T. Kandemir:
Address Code and Arithmetic Optimizations for Embedded Systems. VLSI Design 2002: 619-624 - [c51]N. E. Crosbie, Mahmut T. Kandemir, Ibrahim Kolcu, J. Ramanujam, Alok N. Choudhary:
Strategies for Improving Data Locality in Embedded Applications. VLSI Design 2002: 631- - [p1]
- 2001
- [j26]Mahmut T. Kandemir, J. Ramanujam:
Data Relation Vectors: A New Abstraction for Data Optimizations. IEEE Trans. Computers 50(8): 798-810 (2001) - [j25]Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee:
A Layout-Conscious Iteration Space Transformation Technique. IEEE Trans. Computers 50(12): 1321-1336 (2001) - [j24]Siddharth Rele, Vipin Jain, Santosh Pande, J. Ramanujam:
Compact and efficient code generation through program restructuringon limited memory embedded DSPs. IEEE Trans. on CAD of Integrated Circuits and Systems 20(4): 477-494 (2001) - [j23]M. Narasimhan, J. Ramanujam:
A fast approach to computing exact solutions to the resource-constrained scheduling problem. ACM Trans. Design Autom. Electr. Syst. 6(4): 490-500 (2001) - [j22]Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé:
Static and Dynamic Locality Optimizations Using Integer Linear Programming. IEEE Trans. Parallel Distrib. Syst. 12(9): 922-941 (2001) - [c50]J. Ramanujam:
Integer Lattice Based Methods for Local Address Generation for Block-Cyclic Distributions. Compiler Optimizations for Scalable Parallel Systems Languages 2001: 597-648 - [c49]J. Ramanujam, Jinpyo Hong, Mahmut T. Kandemir, Amit Narayan:
Reducing Memory Requirements of Nested Loops for Embedded Systems. DAC 2001: 359-364 - [c48]Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh:
Dynamic Management of Scratch-Pad Memory Space. DAC 2001: 690-695 - [c47]Daniel Cociorva, J. W. Wilkins, Gerald Baumgartner, P. Sadayappan, J. Ramanujam, Marcel Nooijen, David E. Bernholdt, Robert J. Harrison:
Towards Automatic Synthesis of High-Performance Codes for Electronic Structure Calculations: Data Locality Optimization. HiPC 2001: 237-248 - [c46]Daniel Cociorva, J. W. Wilkins, Chi-Chung Lam, Gerald Baumgartner, J. Ramanujam, P. Sadayappan:
Loop optimization for a class of memory-constrained computations. ICS 2001: 103-113 - [c45]Mahmut T. Kandemir, J. Ramanujam, Ugur Sezer:
Compiler support for block buffering. ISLPED 2001: 76-79 - [c44]Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, J. Ramanujam:
Morphable Cache Architectures: Potential Benefits. LCTES/OM 2001: 128-137 - 2000
- [j21]Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary:
Compiler Algorithms for Optimizing Locality and Parallelism on Shared and Distributed-Memory Machines. J. Parallel Distrib. Comput. 60(8): 924-965 (2000) - [j20]Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Meenakshi A. Kandaswamy:
A Unified Framework for Optimizing Locality, Parallelism, and Communication in Out-of-Core Computations. IEEE Trans. Parallel Distrib. Syst. 11(7): 648-668 (2000) - [j19]Mahmut T. Kandemir, Alok N. Choudhary, Prithviraj Banerjee, J. Ramanujam, U. Nagaraj Shenoy:
Minimizing Data and Synchronization Costs in One-Way Communication. IEEE Trans. Parallel Distrib. Syst. 11(12): 1232-1251 (2000) - [c43]Mahmut T. Kandemir, J. Ramanujam:
Data Relation Vectors: A New Abstraction for Data Optimizations. IEEE PACT 2000: 227-236 - [c42]M. Narasimhan, J. Ramanujam:
On lower bounds for scheduling problems in high-level synthesis. DAC 2000: 546-551 - [c41]Sunil Atri, J. Ramanujam, Mahmut T. Kandemir:
Improving Offset Assignment on Embedded Processors Using Transformations. HiPC 2000: 367-374 - [c40]Sunil Atri, J. Ramanujam, Mahmut T. Kandemir:
Improving Offset Assignment for Embedded Processors. LCPC 2000: 158-172
1990 – 1999
- 1999
- [j18]Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee:
A Matrix-Based Approach to Global Locality Optimization. J. Parallel Distrib. Comput. 58(2): 190-235 (1999) - [j17]Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary:
Improving Cache Locality by a Combination of Loop and Data Transformation. IEEE Trans. Computers 48(2): 159-167 (1999) - [j16]Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy:
A global communication optimization technique based on data-flow analysis and linear algebra. ACM Trans. Program. Lang. Syst. 21(6): 1251-1297 (1999) - [j15]Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam:
A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts. IEEE Trans. Parallel Distrib. Syst. 10(2): 115-135 (1999) - [c39]Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee:
On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors. IEEE PACT 1999: 203-211 - [c38]Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam:
I/O-Conscious Tiling for Disk-Resident Data Sets. Euro-Par 1999: 430-439 - [c37]