| 2010 | ||
|---|---|---|
| c10 | J. Singh, Krishnan Ramakrishnan, S. Mookerjea, Suman Datta, Narayanan Vijaykrishnan, D. K. Pradhan: A novel si-tunnel FET based SRAM design for ultra low-power 0.3V VDD applications. ASP-DAC 2010: 181-186 | |
| c9 | Andrew J. Ricketts, J. Singh, Krishnan Ramakrishnan, Narayanan Vijaykrishnan, D. K. Pradhan: Investigating the impact of NBTI on different power saving cache strategies. DATE 2010: 592-597 | |
| 2009 | ||
| j4 | Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan: New-Age: A Negative Bias Temperature Instability-Estimation Framework for Microarchitectural Components. International Journal of Parallel Programming 37(4): 417-431 (2009) | |
| j3 | Madhu Mutyam, Feng Wang, Krishnan Ramakrishnan, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin: Process-Variation-Aware Adaptive Cache Architecture and Management. IEEE Trans. Computers 58(7): 865-877 (2009) | |
| j2 | Rajaraman Ramanarayanan, Vijay Degalahal, Krishnan Ramakrishnan, Jungsub Kim, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Kenan Unlu: Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits. IEEE Trans. Dependable Sec. Comput. 6(3): 202-216 (2009) | |
| c8 | Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan: A framework for estimating NBTI degradation of microarchitectural components. ASP-DAC 2009: 455-460 | |
| c7 | Krishnan Ramakrishnan, Goshaidas Ray: Delay-dependent stability analysis of linear system with additive time-varying delays. CASE 2009: 122-126 | |
| c6 | Sungmin Bae, Krishnan Ramakrishnan, Narayanan Vijaykrishnan: A Novel Low Area Overhead Body Bias FPGA Architecture for Low Power Applications. ISVLSI 2009: 193-198 | |
| 2008 | ||
| j1 | Suresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari: Toward Increasing FPGA Lifetime. IEEE Trans. Dependable Sec. Comput. 5(2): 115-127 (2008) | |
| c5 | Prasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie, Vijaykrishnan Narayanan: Thermal-aware reliability analysis for platform FPGAs. ICCAD 2008: 722-727 | |
| c4 | Krishnan Ramakrishnan, Xiaoxia Wu, Narayanan Vijaykrishnan, Yuan Xie: Comparative analysis of NBTI effects on low power and high performance flip-flops. ICCD 2008: 200-205 | |
| c3 | Krishnan Ramakrishnan, R. Rajaraman, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin, Kenan Unlu: Hierarchical Soft Error Estimation Tool (HSEET). ISQED 2008: 680-683 | |
| 2007 | ||
| c2 | Krishnan Ramakrishnan, R. Rajaraman, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Variation Impact on SER of Combinational Circuits. ISQED 2007: 911-916 | |
| c1 | Krishnan Ramakrishnan, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Mary Jane Irwin: Impact of NBTI on FPGAs. VLSI Design 2007: 717-722 | |
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