Charles Ouyang

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	2013
j1		Visvesh S. Sathe, Srikanth Arekapudi, Alexander T. Ishii, Charles Ouyang, Marios C. Papaefthymiou, Samuel Naffziger: Resonant-Clock Design for a Power-Efficient, High-Volume x86-64 Microprocessor. J. Solid-State Circuits 48(1): 140-149 (2013)
	2012
c1		Visvesh S. Sathe, Srikanth Arekapudi, Charles Ouyang, Marios C. Papaefthymiou, Alexander T. Ishii, Samuel Naffziger: Resonant clock design for a power-efficient high-volume x86-64 microprocessor. ISSCC 2012: 68-70

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