Yoshitaka Murasaka

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	2011
j3		Atsushi Iwata, Yoshitaka Murasaka, Tomoaki Maeda, Takafumi Ohmoto: Background Calibration Techniques for Low-Power and High-Speed Data Conversion. IEICE Transactions 94-C(6): 923-929 (2011)
	2007
j2		Daisuke Kosaka, Makoto Nagata, Yoshitaka Murasaka, Atsushi Iwata: Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits. IEICE Transactions 90-A(2): 380-387 (2007)
j1		Daisuke Kosaka, Makoto Nagata, Yoshitaka Murasaka, Atsushi Iwata: Chip-Level Substrate Coupling Analysis with Reference Structures for Verification. IEICE Transactions 90-A(12): 2651-2660 (2007)
	2002
c2		Makoto Nagata, Yoshitaka Murasaka, Youichi Nishimori, Takashi Morie, Atsushi Iwata: Substrate Noise Analysis with Compact Digital Noise Injection and Substrate Models. VLSI Design 2002: 71-76
	2001
c1		Yoshitaka Murasaka, Makoto Nagata, Takafumi Ohmoto, Takashi Morie, Atsushi Iwata: Chip-Level Substrate Noise Analysis with Network Reduction by Fundamental Matrix Computation. ISQED 2001: 482-487

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