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Richard Morren
2010 – today
- 2010
[c5]Tom Waayers, Richard Morren, Xijiang Lin, Mark Kassab: Clock control architecture and ATPG for reducing pattern count in SoC designs with multiple clock domains. ITC 2010: 114-123
2000 – 2009
- 2005
[c4]Tom Waayers, Richard Morren, Roberto Grandi: Definition of a robust modular SOC test architecture; resurrection of the single TAM daisy-chain. ITC 2005: 10
1990 – 1999
- 1993
[c3]R. Mehtani, B. Atzema, M. De Jonghe, Richard Morren, Geert Seuren, Taco Zwemstra: Mix Test: A Mixed-Signal Extension to a Digital Test System. ITC 1993: 945-953- 1992
[c2]Bas Verhelst, Richard Morren, Keith Baker: Using EDIF for Transfer of Test Data: Practical Experience. ITC 1992: 459-465
[c1]R. Mehtani, M. De Jonghe, Richard Morren, Keith Baker: Improving Total IC Design Quality Using Application Mode Testing. ITC 1992: 866-872
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last updated on 2012-09-10 15:45 CEST by the dblp team



