François Marc

Olivier Héron, Clement Bertolini, Chiara Sandionigi, Nicolas Ventroux, François Marc: On the Simulation of HCI-Induced Variations of IC Timings at High Level. J. Electronic Testing 29(2): 127-141 (2013)

Tushar Gupta, Clement Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc: Impact of Power Consumption and Temperature on Processor Lifetime Reliability. J. Low Power Electronics 8(1): 83-94 (2012)

Bertrand Ardouin, Jean-Yves Dupuy, Jean Godin, Virginie Nodjiadjim, Muriel Riet, François Marc, Gilles Amadou Koné, Sudip Ghosh, Brice Grandchamp, Cristell Maneux: Advancements on reliability-aware analog circuit design. ESSCIRC 2012: 46-52

Clement Bertolini, Olivier Héron, Nicolas Ventroux, François Marc: Relation between HCI-induced performance degradation and applications in a RISC processor. IOLTS 2012: 67-72

Nathalie Labat, François Marc: Editorial. Microelectronics Reliability 51(9-11): 1423-1424 (2011)

G. A. Koné, Brice Grandchamp, C. Hainaut, François Marc, C. Maneux, Nathalie Labat, Thomas Zimmer, Virginie Nodjiadjim, Muriel Riet, Jean Godin: Reliability of submicron InGaAs/InP DHBT under thermal and electrical stresses. Microelectronics Reliability 51(9-11): 1730-1735 (2011)

Sudip Ghosh, Brice Grandchamp, G. A. Koné, François Marc, C. Maneux, Thomas Zimmer, Virginie Nodjiadjim, Muriel Riet, Jean-Yves Dupuy, Jean Godin: Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design. Microelectronics Reliability 51(9-11): 1736-1741 (2011)

G. A. Koné, Brice Grandchamp, C. Hainaut, François Marc, C. Maneux, Nathalie Labat, Thomas Zimmer, Virginie Nodjiadjim, Jean Godin: Preliminary results of storage accelerated aging test on InP/InGaAs DHBT. Microelectronics Reliability 50(9-11): 1548-1553 (2010)

Sudip Ghosh, François Marc, C. Maneux, Brice Grandchamp, G. A. Koné, Thomas Zimmer: Thermal aging model of InP/InGaAs/InP DHBT. Microelectronics Reliability 50(9-11): 1554-1558 (2010)

Tushar Gupta, Clement Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc: High Level Power and Energy Exploration Using ArchC. SBAC-PAD 2010: 25-32

C. Bestory, François Marc, S. Duzellier, Hervé Levi: Electrical aging behavioral modeling for reliability analyses of ionizing dose effects on an n-MOS simple current mirror. Microelectronics Reliability 49(9-11): 946-951 (2009)

C. Bestory, François Marc, Hervé Levi: Statistical analysis during the reliability simulation. Microelectronics Reliability 47(9-11): 1353-1357 (2007)

C. Bestory, François Marc, Hervé Levi, Y. Danto: Multi-level Modeling of Hot Carrier Injection for Reliability. FDL 2006: 61-68

B. Mongellaz, François Marc, Y. Danto: Ageing simulation of MOSFET circuit using a VHDL-AMS behavioural modelling: an experimental case study. Microelectronics Reliability 43(9-11): 1513-1518 (2003)

François Marc, B. Mongellaz, Y. Danto: Reliability simulation of electronic circuits with VHDL-AMS. FDL 2003: 175-184

B. Mongellaz, François Marc, N. Milet-Lewis, Y. Danto: Contribution to ageing simulation of complex analogue circuit using VHDL-AMS behavioural modelling language. Microelectronics Reliability 42(9-11): 1353-1358 (2002)