- CSB - MetaPress - Google - Bing - Yahoo
 | 2012 | |
|---|---|---|
| c2 |      | Manoj Kumar Majumder, Nisarg D. Pandya, Brajesh Kumar Kaushik, S. K. Manhas: Analysis of crosstalk delay and area for MWNT and bundled SWNT in global VLSI interconnects. ISQED 2012: 291-297 |
| c1 | | Baljit Kaur, Sandeep Vundavalli, S. K. Manhas, Sudeb Dasgupta, Bulusu Anand: An accurate current source model for CMOS based combinational logic cell. ISQED 2012: 561-565 |
| 2011 | ||
| j4 | | S. K. Manhas, N. Singh, G. Q. Lo: Barrier layer thickness analysis for reliable copper plug process in CMOS technology. Microelectronics Reliability 51(8): 1365-1371 (2011) |
| 2004 | ||
| j3 | | M. M. De Souza, S. K. Manhas, D. Chandra Sekhar, A. S. Oates, Prasad Chaparala: Influence of mobility model on extraction of stress dependent source-drain series resistance. Microelectronics Reliability 44(1): 25-32 (2004) |
| 2003 | ||
| j2 | | S. K. Manhas, D. Chandra Sekhar, A. S. Oates, M. M. De Souza: Characterisation of series resistance degradation through charge pumping technique. Microelectronics Reliability 43(4): 617-624 (2003) |
| 2001 | ||
| j1 | | M. M. De Souza, J. Wang, S. K. Manhas, E. M. Sankara Narayanan, A. S. Oates: A comparison of early stage hot carrier degradation behaviour in 5 and 3 V sub-micron low doped drain metal oxide semiconductor field effect transistors. Microelectronics Reliability 41(2): 169-177 (2001) |
Colors in the list of coauthors
Last update Mon May 20 00:53:09 2013 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page