Niti Madan

Xiaowei Jiang, Niti Madan, Li Zhao, Mike Upton, Ravishankar Iyer, Srihari Makineni, Donald Newell, Yan Solihin, Rajeev Balasubramonian: CHOP: Integrating DRAM Caches for CMP Server Platforms. IEEE Micro 31(1): 99-108 (2011)

Niti Madan, Alper Buyuktosunoglu, Pradip Bose, Murali Annavaram: A case for guarded power gating for multi-core processors. HPCA 2011: 291-300

Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor V. Zyuban: Power-efficient, reliable microprocessor architectures: modeling and design methods. ACM Great Lakes Symposium on VLSI 2010: 299-304

Xiaowei Jiang, Niti Madan, Li Zhao, Mike Upton, Ravishankar Iyer, Srihari Makineni, Donald Newell, Yan Solihin, Rajeev Balasubramonian: CHOP: Adaptive filter-based DRAM caching for CMP server platforms. HPCA 2010: 1-12

Niti Madan, Alper Buyuktosunoglu, Pradip Bose, Murali Annavaram: Guarded Power Gating in a Multi-core Setting. ISCA Workshops 2010: 198-210

Niti Madan, Li Zhao, Naveen Muralimanohar, Aniruddha N. Udipi, Rajeev Balasubramonian, Ravishankar Iyer, Srihari Makineni, Donald Newell: Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy. HPCA 2009: 262-274

Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen Muralimanohar, Rajeev Balasubramonian: Scalable and reliable communication for hardware transactional memory. PACT 2008: 144-154

Niti Madan, Rajeev Balasubramonian: Power Efficient Approaches to Redundant Multithreading. IEEE Trans. Parallel Distrib. Syst. 18(8): 1066-1079 (2007)

Niti Madan, Rajeev Balasubramonian: Leveraging 3D Technology for Improved Reliability. MICRO 2007: 223-235