Mirko Loghi

Haroon Mahmood, Massimo Poncino, Mirko Loghi, Enrico Macii: Application-specific memory partitioning for joint energy and lifetime optimization. DATE 2012: 364-369

Mirko Loghi, Haroon Mahmood, Andrea Calimera, Massimo Poncino, Enrico Macii: Energy-optimal caches with guaranteed lifetime. ISLPED 2012: 141-146

Haroon Mahmood, Massimo Poncino, Mirko Loghi, Enrico Macii: Aging-aware caches with graceful degradation of performance. VLSI-SoC 2012: 237-242

Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino: Partitioned cache architectures for reduced NBTI-induced aging. DATE 2011: 938-943

Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino: Buffering of frequent accesses for reduced cache aging. ACM Great Lakes Symposium on VLSI 2011: 295-300

Mirko Loghi, Olga Golubeva, Enrico Macii, Massimo Poncino: Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking. IEEE Trans. Computers 59(7): 891-904 (2010)

Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino: Aging effects of leakage optimizations for caches. ACM Great Lakes Symposium on VLSI 2010: 95-98

Andrea Calimera, Mirko Loghi, Enrico Macii, Massimo Poncino: Dynamic indexing: concurrent leakage and aging optimization for caches. ISLPED 2010: 343-348

Franco Fummi, Mirko Loghi, Massimo Poncino, Graziano Pravadelli: A cosimulation methodology for HW/SW validation and performance estimation. ACM Trans. Design Autom. Electr. Syst. 14(2) (2009)

Mirko Loghi, Paolo Azzoni, Massimo Poncino: Tag Overflow Buffering: Reducing Total Memory Energy by Reduced-Tag Matching. IEEE Trans. VLSI Syst. 17(5): 728-732 (2009)

Cesare Ferri, R. Iris Bahar, Mirko Loghi, Massimo Poncino: Energy-optimal synchronization primitives for single-chip multi-processors. ACM Great Lakes Symposium on VLSI 2009: 141-144

Franco Fummi, Mirko Loghi, Giovanni Perbellini, Massimo Poncino: SystemC co-simulation for core-based embedded systems. Design Autom. for Emb. Sys. 11(2-3): 141-166 (2007)

Francesco Poletti, Antonio Poggiali, Davide Bertozzi, Luca Benini, Pol Marchal, Mirko Loghi, Massimo Poncino: Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support. IEEE Trans. Computers 56(5): 606-621 (2007)

Mirko Loghi, Luca Benini, Massimo Poncino: Power macromodeling of MPSoC message passing primitives. ACM Trans. Embedded Comput. Syst. 6(4) (2007)

Olga Golubeva, Mirko Loghi, Massimo Poncino, Enrico Macii: Architectural leakage-aware management of partitioned scratchpad memories. DATE 2007: 1665-1670

Olga Golubeva, Mirko Loghi, Massimo Poncino: On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors. ACM Great Lakes Symposium on VLSI 2007: 489-492

Olga Golubeva, Mirko Loghi, Enrico Macii, Massimo Poncino: Locality-driven architectural cache sub-banking for leakage energy reduction. ISLPED 2007: 274-279

Mirko Loghi, Massimo Poncino, Luca Benini: Cache coherence tradeoffs in shared-memory MPSoCs. ACM Trans. Embedded Comput. Syst. 5(2): 383-407 (2006)

Franco Fummi, Giovanni Perbellini, Mirko Loghi, Massimo Poncino: ISS-centric modular HW/SW co-simulation. ACM Great Lakes Symposium on VLSI 2006: 31-36

Mirko Loghi, Massimo Poncino, Luca Benini: Synchronization-driven dynamic speed scaling for MPSoCs. ISLPED 2006: 346-349

Mirko Loghi, Tiziana Margaria, Graziano Pravadelli, Bernhard Steffen: Dynamic and Formal Verification of Embedded Systems: A Comparative Survey. International Journal of Parallel Programming 33(6): 585-611 (2005)

Mirko Loghi, Massimo Poncino: Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions. DATE 2005: 508-513

Mirko Loghi, Paolo Azzoni, Massimo Poncino: Tag Overflow Buffering: An Energy-Efficient Cache Architecture. DATE 2005: 520-525

Franco Fummi, Mirko Loghi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino: Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation. DATE 2005: 798-803

Mirko Loghi, Martin Letis, Luca Benini, Massimo Poncino: Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors. ACM Great Lakes Symposium on VLSI 2005: 276-281

Mirko Loghi, Federico Angiolini, Davide Bertozzi, Luca Benini, Roberto Zafalon: Analyzing On-Chip Communication in a MPSoC Environment. DATE 2004: 752-757

Mirko Loghi, Massimo Poncino, Luca Benini: Cycle-accurate power analysis for multiprocessor systems-on-a-chip. ACM Great Lakes Symposium on VLSI 2004: 410-406

Mirko Loghi, Luca Benini, Massimo Poncino: Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor. ICCD 2004: 393-396